New patch to review for coreboot: marvell/mvmap2315: add a stub implementation of the mvmap2315 SOC.
hakim giydan (hgiydan@marvell.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15506
-gerrit
commit dc2ce56a1ada53533d45ef8553391240029b541e Author: Hakim Giydan hgiydan@marvell.com Date: Wed Jun 29 18:50:41 2016 -0700
marvell/mvmap2315: add a stub implementation of the mvmap2315 SOC.
Most things still need to be filled in, but this will allow us to build boards which use this SOC.
Change-Id: I8cc3e99df915bb289a2f3539db103cd6be90a0b2 Signed-off-by: Hakim Giydan hgiydan@marvell.com --- src/soc/marvell/mvmap2315/Kconfig | 37 +++ src/soc/marvell/mvmap2315/Makefile.inc | 53 +++ src/soc/marvell/mvmap2315/assert.c | 42 +++ src/soc/marvell/mvmap2315/bootblock.stub | 20 ++ src/soc/marvell/mvmap2315/cbmem.c | 25 ++ src/soc/marvell/mvmap2315/clock.c | 50 +++ src/soc/marvell/mvmap2315/gic.c | 30 ++ src/soc/marvell/mvmap2315/include/soc/addressmap.h | 35 ++ src/soc/marvell/mvmap2315/include/soc/assert.h | 31 ++ src/soc/marvell/mvmap2315/include/soc/clock.h | 358 +++++++++++++++++++++ src/soc/marvell/mvmap2315/include/soc/memlayout.ld | 66 ++++ .../marvell/mvmap2315/include/soc/mmu_operations.h | 27 ++ .../mvmap2315/include/soc/monotonic_timer.h | 50 +++ src/soc/marvell/mvmap2315/include/soc/power.h | 33 ++ src/soc/marvell/mvmap2315/include/soc/ramstage.h | 23 ++ src/soc/marvell/mvmap2315/media.c | 26 ++ src/soc/marvell/mvmap2315/mmu_operations.c | 46 +++ src/soc/marvell/mvmap2315/monotonic_timer.c | 63 ++++ src/soc/marvell/mvmap2315/power.c | 41 +++ src/soc/marvell/mvmap2315/ramstage.c | 34 ++ src/soc/marvell/mvmap2315/romstage.c | 78 +++++ src/soc/marvell/mvmap2315/romstage_asm.S | 66 ++++ src/soc/marvell/mvmap2315/soc.c | 46 +++ src/soc/marvell/mvmap2315/stage_entry.S | 26 ++ src/soc/marvell/mvmap2315/uart.c | 46 +++ 25 files changed, 1352 insertions(+)
diff --git a/src/soc/marvell/mvmap2315/Kconfig b/src/soc/marvell/mvmap2315/Kconfig new file mode 100644 index 0000000..cfa622e --- /dev/null +++ b/src/soc/marvell/mvmap2315/Kconfig @@ -0,0 +1,37 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2016 Marvell, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +config SOC_MARVELL_MVMAP2315 + bool + default n + select ARM_LPAE + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_RAMSTAGE_ARMV8_64 + select ARCH_ROMSTAGE_ARMV7_R + select ARCH_VERSTAGE_ARMV7_R + select GENERIC_UDELAY + select GIC + select HAVE_HARD_RESET + select HAVE_MONOTONIC_TIMER + select HAVE_UART_SPECIAL + select UNCOMPRESSED_RAMSTAGE + select VBOOT_DYNAMIC_WORK_BUFFER + +if SOC_MARVELL_MVMAP2315 + +config EMULATION + bool + default n +endif diff --git a/src/soc/marvell/mvmap2315/Makefile.inc b/src/soc/marvell/mvmap2315/Makefile.inc new file mode 100644 index 0000000..d80453a --- /dev/null +++ b/src/soc/marvell/mvmap2315/Makefile.inc @@ -0,0 +1,53 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2016 Marvell, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +ramstage-y += assert.c +ramstage-y += cbmem.c +ramstage-y += clock.c +ramstage-y += gic.c +ramstage-y += media.c +ramstage-y += mmu_operations.c +ramstage-y += monotonic_timer.c +ramstage-y += ramstage.c +ramstage-y += soc.c +ramstage-y += stage_entry.S +ramstage-y += uart.c + +romstage-y += assert.c +romstage-y += cbmem.c +romstage-y += clock.c +romstage-y += media.c +romstage-y += monotonic_timer.c +romstage-y += power.c +romstage-y += romstage_asm.S +romstage-y += romstage.c +romstage-y += uart.c + +CPPFLAGS_common += -Isrc/soc/marvell/mvmap2315/include/ + +all: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.bin + +## Replacing bootblock.bin with bootblock.stub since bootROM load and +## jump to romstage code directly. +## it is necessary to create a bootblock.stub file, or the final coreboot +## make stage will fail when it can't find bootblock.bin. + +$(objcbfs)/bootblock.bin: src/soc/marvell/mvmap2315/bootblock.stub + cat src/soc/marvell/mvmap2315/bootblock.stub > $(objcbfs)/bootblock.bin + +## generating romtage.bin since it is required to create the BDB + +$(objcbfs)/romstage.bin: $(objcbfs)/romstage.elf + $(OBJCOPY_romstage) -O binary $(objcbfs)/romstage.elf $(objcbfs)/romstage.bin diff --git a/src/soc/marvell/mvmap2315/assert.c b/src/soc/marvell/mvmap2315/assert.c new file mode 100644 index 0000000..f4c498c --- /dev/null +++ b/src/soc/marvell/mvmap2315/assert.c @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <stddef.h> + +#include <console/console.h> +#include <soc/assert.h> +#include <stddef.h> + +/*Trivial __assert_func */ +static void __assert_func(const char *file, int line, + const char *func, + const char *failedexpr) +{ +#ifdef CONFIG_CONSOLE_SERIAL_UART + printk(BIOS_ERR, "\n\nASSERT!!\n\n"); + printk(BIOS_ERR, "%s:%d - %s - %s\n", file, line, func, failedexpr); +#endif + + /* Purposely empty */ + while (1) + ; +} + +/* Minimal __assert() */ +void __assert(const char *failedexpr, const char *file, int line) +{ + __assert_func(file, line, NULL, failedexpr); +} diff --git a/src/soc/marvell/mvmap2315/bootblock.stub b/src/soc/marvell/mvmap2315/bootblock.stub new file mode 100644 index 0000000..0793599 --- /dev/null +++ b/src/soc/marvell/mvmap2315/bootblock.stub @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/* This is a dummy file to replace bootblock.bin in the final coreboot + * image since bootblobk is been bypassed and the system is jumping + * directory to romstage from bootROM + */ diff --git a/src/soc/marvell/mvmap2315/cbmem.c b/src/soc/marvell/mvmap2315/cbmem.c new file mode 100644 index 0000000..a78c2ca --- /dev/null +++ b/src/soc/marvell/mvmap2315/cbmem.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <stddef.h> + +#include <cbmem.h> + +void *cbmem_top(void) +{ + return (void *)CONFIG_RAMTOP; +} diff --git a/src/soc/marvell/mvmap2315/clock.c b/src/soc/marvell/mvmap2315/clock.c new file mode 100644 index 0000000..f3e17cc --- /dev/null +++ b/src/soc/marvell/mvmap2315/clock.c @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/clock.h> +#include <arch/io.h> +#include <soc/clock.h> + +void clock_init_arm_generic_timer(void) +{ + u32 freq = MVMAP2315_CLK_M_KHZ * 1000; + u32 reg; + + set_cntfrq(freq); + + reg = read32(&mvmap2315_gentimer->cntfid0); + reg = freq; + write32(&mvmap2315_gentimer->cntfid0, reg); + + reg = read32(&mvmap2315_gentimer->cntcr); + reg |= MVMAP2315_GENTIMER_EN; + write32(&mvmap2315_gentimer->cntcr, reg); +} + +void configure_main_clk_pll(void) +{ + u32 reg; + + /* pick up speed as soon as possible */ + while (!(read32(&mvmap2315_pll->lock_status) + & MVMAP2315_PLL_LOCK)) + ; + + write32(&mvmap2315_apmu_clk->apaonclk_clkgenconfig, 1); + + reg = read32(&mvmap2315_pll->fixed_mode_ssc_mode); + reg &= ~MVMAP2315_PLL_BYPASS_EN; + write32(&mvmap2315_pll->fixed_mode_ssc_mode, reg); +} diff --git a/src/soc/marvell/mvmap2315/gic.c b/src/soc/marvell/mvmap2315/gic.c new file mode 100644 index 0000000..9d0f9a6 --- /dev/null +++ b/src/soc/marvell/mvmap2315/gic.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/addressmap.h> +#include <gic.h> + +/* Return a pointer to the base of the GIC distributor mmio region. */ +void *gicd_base(void) +{ + return (void *)MVMAP2315_GICD_BASE; +} + +/* Return a pointer to the base of the GIC cpu mmio region. */ +void *gicc_base(void) +{ + return (void *)MVMAP2315_GICC_BASE; +} diff --git a/src/soc/marvell/mvmap2315/include/soc/addressmap.h b/src/soc/marvell/mvmap2315/include/soc/addressmap.h new file mode 100644 index 0000000..6cf5db2 --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/addressmap.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__ +#define __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__ + +#include <stdint.h> +#include <stdlib.h> + +enum { + MVMAP2315_RAM_BASE = 0x00000000, + MVMAP2315_CBFS_BASE = 0x00400000, + MVMAP2315_MAIN_PLL_BASE = 0xE0125000, + MVMAP2315_APMU_CLK_BASE = 0xE0125400, + MVMAP2315_GENTIMER_BASE = 0xE0137000, + MVMAP2315_TIMER0_BASE = 0xE1020000, + MVMAP2315_MPMU_CLK_BASE = 0xEF000800, + MVMAP2315_GICD_BASE = 0xF0401000, + MVMAP2315_GICC_BASE = 0xF0402000, + MVMAP2315_FLASH_BASE = 0xFE000000, +}; + +#endif /* __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__ */ diff --git a/src/soc/marvell/mvmap2315/include/soc/assert.h b/src/soc/marvell/mvmap2315/include/soc/assert.h new file mode 100644 index 0000000..760e39b --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/assert.h @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MARVELL_MVMAP2315_ASSERT_H__ +#define __SOC_MARVELL_MVMAP2315_ASSERT_H__ + +#include <stdint.h> +#include <stdlib.h> + +void __assert(const char *failedexpr, const char *file, int line); + +#define assert(x) \ + do { \ + if (!(x)) \ + __assert("assertion failed", \ + __FILE__, __LINE__); \ + } while (0) + +#endif /* __SOC_MARVELL_MVMAP2315_ASSERT_H__ */ diff --git a/src/soc/marvell/mvmap2315/include/soc/clock.h b/src/soc/marvell/mvmap2315/include/soc/clock.h new file mode 100644 index 0000000..12d32c1 --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/clock.h @@ -0,0 +1,358 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MARVELL_MVMAP2315_CLOCK_H__ +#define __SOC_MARVELL_MVMAP2315_CLOCK_H__ + +#include <stdint.h> +#include <stdlib.h> +#include <types.h> + +#include <soc/addressmap.h> + +#define MVMAP2315_CLK_M_KHZ 25000 +#define MVMAP2315_GENTIMER_EN BIT(0) + +struct mvmap2315_gentimer_regs { + u32 cntcr; + u32 cntsr; + u32 cntcvl; + u32 cntcvu; + u8 _reserved0[0x10]; + u32 cntfid0; + u8 _reserved1[0xfac]; + u32 pidr4; + u8 _reserved2[0x0c]; + u32 pidr0; + u32 pidr1; + u32 pidr2; + u32 pidr3; + u32 cidr0; + u32 cidr1; + u32 cidr2; + u32 cidr3; +}; + +check_member(mvmap2315_gentimer_regs, cidr3, 0xFFC); +static struct mvmap2315_gentimer_regs * const mvmap2315_gentimer + = (void *)MVMAP2315_GENTIMER_BASE; + +#define MVMAP2315_PLL_LOCK BIT(0) +#define MVMAP2315_PLL_BYPASS_EN BIT(16) + +struct mvmap2315_main_pll_regs { + u32 rst_prediv; + u32 mult_postdiv; + u32 kvco; + u32 misc; + u32 feedback_mode_deskew; + u32 offset_mode; + u32 fixed_mode_ssc_mode; + u32 ssc_freq_ssc_range; + u32 clk_ctrl_marvell_test; + u32 lock_status; + u32 reserve_out; +}; + +check_member(mvmap2315_main_pll_regs, reserve_out, 0x28); +static struct mvmap2315_main_pll_regs * const mvmap2315_pll + = (void *)MVMAP2315_MAIN_PLL_BASE; + +#define MVMAP2315_UART_CLK_EN BIT(0) +struct mvmap2315_apmu_clk_regs { + u32 uartfracdivcfg0; + u8 _reserved0[0x0c]; + u32 uartfracdivcfg1; + u8 _reserved1[0x0c]; + u32 r4clkstatus; + u8 _reserved2[0x5c]; + u32 busclk2x_a2_clkgenconfig; + u32 busclk2x_a2_clkgenstatus; + u8 _reserved3[0x08]; + u32 busclk_mcix2_clkgenconfig; + u32 busclk_mcix2_clkgenstatus; + u32 busclk_mcix2_phyreset_clkgenconfig; + u32 busclk_mcix2_phyreset_clkgenstatus; + u32 busclk_mcix10_clkgenconfig; + u32 busclk_mcix10_clkgenstatus; + u32 busclk_mcix1_phyreset0_clkgenconfig; + u32 busclk_mcix1_phyreset0_clkgenstatus; + u32 busclk_mcix11_clkgenconfig; + u32 busclk_mcix11_clkgenstatus; + u32 busclk_mcix1_phyreset1_clkgenconfig; + u32 busclk_mcix1_phyreset1_clkgenstatus; + u32 busclk_mcix12_clkgenconfig; + u32 busclk_mcix12_clkgenstatus; + u32 busclk_mcix1_phyreset2_clkgenconfig; + u32 busclk_mcix1_phyreset2_clkgenstatus; + u32 busclk_mcix13_clkgenconfig; + u32 busclk_mcix13_clkgenstatus; + u32 busclk_mcix1_phyreset3_clkgenconfig; + u32 busclk_mcix1_phyreset3_clkgenstatus; + u8 _reserved4[0x10]; + u32 busclk_aes_clkgenconfig; + u32 busclk_aes_clkgenstatus; + u32 busclk_apaonbus_hs_clkgenconfig; + u32 busclk_apaonbus_hs_clkgenstatus; + u32 busclk_a2_clkgenconfig; + u32 busclk_a2_clkgenstatus; + u8 _reserved5[0x78]; + u32 apaonclk_clkgenconfig; + u32 apaonclk_clkgenstatus; + u32 apaonclk_apmucpu_clkgenconfig; + u32 apaonclk_apmucpu_clkgenstatus; + u32 apaonclk_sdmmc_clkgenconfig; + u32 apaonclk_sdmmc_clkgenstatus; + u8 _reserved6[0x08]; + u32 apaonclk_m2m_clkgenconfig; + u32 apaonclk_m2m_clkgenstatus; + u32 apaonclk_apb_clkgenconfig; + u32 apaonclk_apb_clkgenstatus; + u8 _reserved7[0x50]; + u32 bistclk_clkgenconfig; + u32 bistclk_clkgenstatus; + u32 bistclk_a2reset_clkgenconfig; + u32 bistclk_a2reset_clkgenstatus; + u32 bistclk_apcpureset_clkgenconfig; + u32 bistclk_apcpureset_clkgenstatus; + u32 bistclk_coresightreset_clkgenconfig; + u32 bistclk_coresightreset_clkgenstatus; + u32 bistclk_mcflcreset_clkgenconfig; + u32 bistclk_mcflcreset_clkgenstatus; + u8 _reserved8[0x08]; + u32 bistclk_gpu3dreset_clkgenconfig; + u32 bistclk_gpu3dreset_clkgenstatus; + u32 bistclk_gpu3dcorereset0_clkgenconfig; + u32 bistclk_gpu3dcorereset0_clkgenstatus; + u32 bistclk_gpu3dcorereset1_clkgenconfig; + u32 bistclk_gpu3dcorereset1_clkgenstatus; + u32 bistclk_gpu3dcorereset2_clkgenconfig; + u32 bistclk_gpu3dcorereset2_clkgenstatus; + u32 bistclk_gpu3dcorereset3_clkgenconfig; + u32 bistclk_gpu3dcorereset3_clkgenstatus; + u32 bistclk_gpu2dreset_clkgenconfig; + u32 bistclk_gpu2dreset_clkgenstatus; + u32 bistclk_zramreset_clkgenconfig; + u32 bistclk_zramreset_clkgenstatus; + u32 bistclk_vpuencreset_clkgenconfig; + u32 bistclk_vpuencreset_clkgenstatus; + u32 bistclk_vpudecreset_clkgenconfig; + u32 bistclk_vpudecreset_clkgenstatus; + u32 bistclk_displayreset_clkgenconfig; + u32 bistclk_displayreset_clkgenstatus; + u32 bistclk_edisplayreset_clkgenconfig; + u32 bistclk_edisplayreset_clkgenstatus; + u8 _reserved9[0x78]; + u32 sdmmcbaseclk_clkgenconfig; + u32 sdmmcbaseclk_clkgenstatus; + u8 _reserved10[0x08]; + u32 cfgclk_a2_clkgenconfig; + u32 cfgclk_a2_clkgenstatus; + u8 _reserved11[0x08]; + u32 uartclk0_clkgenconfig; + u32 uartclk0_clkgenstatus; + u8 _reserved12[0x08]; + u32 uartclk1_clkgenconfig; + u32 uartclk1_clkgenstatus; + u8 _reserved13[0x08]; + u32 sspclk0_clkgenconfig; + u32 sspclk0_clkgenstatus; + u8 _reserved14[0x08]; + u32 sspclk1_clkgenconfig; + u32 sspclk1_clkgenstatus; + u8 _reserved15[0x08]; + u32 i2cclk0_clkgenconfig; + u32 i2cclk0_clkgenstatus; + u8 _reserved16[0x08]; + u32 i2cclk1_clkgenconfig; + u32 i2cclk1_clkgenstatus; + u8 _reserved17[0x08]; + u32 i2cclk2_clkgenconfig; + u32 i2cclk2_clkgenstatus; + u8 _reserved18[0x08]; + u32 i2cclk3_clkgenconfig; + u32 i2cclk3_clkgenstatus; + u8 _reserved19[0x08]; + u32 i2cclk4_clkgenconfig; + u32 i2cclk4_clkgenstatus; +}; + +check_member(mvmap2315_apmu_clk_regs, i2cclk4_clkgenstatus, 0x3A4); +static struct mvmap2315_apmu_clk_regs * const mvmap2315_apmu_clk + = (void *)MVMAP2315_APMU_CLK_BASE; + +#define MVMAP2315_AP_RST_EN BIT(0) +#define MVMAP2315_MCU_RST_EN BIT(0) +struct mvmap2315_mpmu_clk_regs { + u32 resetap; + u32 resetmcu; + u32 resetstatus; + u8 _reserved0[4]; + u32 apaudiopllselect; + u8 _reserved1[0x0c]; + u32 sspa_asrc_rx_clk0; + u32 sspa_asrc_rx_clk1; + u32 sspa_asrc_rx_clk2; + u32 sspa_asrc_tx_clk0; + u32 sspa_asrc_tx_clk1; + u32 sspa_asrc_tx_clk2; + u32 dmic_asrc_clk; + u8 _reserved2[4]; + u32 uartfracdivcfg0; + u8 _reserved3[0x0c]; + u32 uartfracdivcfg1; + u8 _reserved4[0xcc]; + u32 clk32k_clkgenconfig; + u32 clk32k_clkgenstatus; + u8 _reserved5[0x08]; + u32 cpudbgclk_clkgenconfig; + u32 cpudbgclk_clkgenstatus; + u8 _reserved6[0x08]; + u32 m4clk_bist_clkgenconfig; + u32 m4clk_bist_clkgenstatus; + u8 _reserved7[0x08]; + u32 bspiclk_clkgenconfig; + u32 bspiclk_clkgenstatus; + u8 _reserved8[0x08]; + u32 dmicclk_clkgenconfig; + u32 dmicclk_clkgenstatus; + u8 _reserved9[0x48]; + u32 sspaclk0_clkgenconfig; + u32 sspaclk0_clkgenstatus; + u32 sspaclk1_clkgenconfig; + u32 sspaclk1_clkgenstatus; + u32 sspaclk2_clkgenconfig; + u32 sspaclk2_clkgenstatus; + u8 _reserved10[0x38]; + u32 mcuclk_clkgenconfig; + u32 mcuclk_clkgenstatus; + u8 _reserved11[0x08]; + u32 mcuclk_cdma_clkgenconfig; + u32 mcuclk_cdma_clkgenstatus; + u8 _reserved12[0x08]; + u32 mcuclk_bspi_clkgenconfig; + u32 mcuclk_bspi_clkgenstatus; + u8 _reserved13[0x08]; + u32 mcuclk_owi_clkgenconfig; + u32 mcuclk_owi_clkgenstatus; + u8 _reserved14[0x08]; + u32 mcuclk_uart0_clkgenconfig; + u32 mcuclk_uart0_clkgenstatus; + u8 _reserved15[0x08]; + u32 mcuclk_uart1_clkgenconfig; + u32 mcuclk_uart1_clkgenstatus; + u8 _reserved16[0x08]; + u32 mcuclk_ssp0_clkgenconfig; + u32 mcuclk_ssp0_clkgenstatus; + u8 _reserved17[0x08]; + u32 mcuclk_ssp1_clkgenconfig; + u32 mcuclk_ssp1_clkgenstatus; + u8 _reserved18[0x08]; + u32 mcuclk_sspa0_clkgenconfig; + u32 mcuclk_sspa0_clkgenstatus; + u8 _reserved19[0x08]; + u32 mcuclk_sspa1_clkgenconfig; + u32 mcuclk_sspa1_clkgenstatus; + u8 _reserved20[0x08]; + u32 mcuclk_sspa2_clkgenconfig; + u32 mcuclk_sspa2_clkgenstatus; + u8 _reserved21[0x08]; + u32 mcuclk_dmic0_clkgenconfig; + u32 mcuclk_dmic0_clkgenstatus; + u8 _reserved22[0x08]; + u32 mcuclk_dmic1_clkgenconfig; + u32 mcuclk_dmic1_clkgenstatus; + u8 _reserved23[0x08]; + u32 mcuclk_dmic2_clkgenconfig; + u32 mcuclk_dmic2_clkgenstatus; + u8 _reserved24[0x08]; + u32 mcuclk_dmic3_clkgenconfig; + u32 mcuclk_dmic3_clkgenstatus; + u8 _reserved25[0x18]; + u32 dmic_dclk0_clkgenconfig; + u32 dmic_dclk0_clkgenstatus; + u8 _reserved26[0x08]; + u32 dmic_dclk1_clkgenconfig; + u32 dmic_dclk1_clkgenstatus; + u8 _reserved27[0x08]; + u32 dmic_dclk2_clkgenconfig; + u32 dmic_dclk2_clkgenstatus; + u8 _reserved28[0x08]; + u32 dmic_dclk3_clkgenconfig; + u32 dmic_dclk3_clkgenstatus; + u8 _reserved29[0x08]; + u32 dmic_engdetclk_clkgenconfig; + u32 dmic_engdetclk_clkgenstatus; + u8 _reserved30[0x38]; + u32 refclk_clkgenconfig; + u32 refclk_clkgenstatus; + u8 _reserved31[0x08]; + u32 refclk_ssp0_clkgenconfig; + u32 refclk_ssp0_clkgenstatus; + u8 _reserved32[0x08]; + u32 refclk_ssp1_clkgenconfig; + u32 refclk_ssp1_clkgenstatus; + u8 _reserved33[0x08]; + u32 refclk_uart0_clkgenconfig; + u32 refclk_uart0_clkgenstatus; + u8 _reserved34[0x08]; + u32 refclk_uart1_clkgenconfig; + u32 refclk_uart1_clkgenstatus; + u8 _reserved35[0x08]; + u32 refclk_i2c0_clkgenconfig; + u32 refclk_i2c0_clkgenstatus; + u8 _reserved36[0x08]; + u32 refclk_i2c1_clkgenconfig; + u32 refclk_i2c1_clkgenstatus; + u8 _reserved37[0x08]; + u32 refclk_i2c2_clkgenconfig; + u32 refclk_i2c2_clkgenstatus; + u8 _reserved38[0x08]; + u32 refclk_i2c3_clkgenconfig; + u32 refclk_i2c3_clkgenstatus; + u8 _reserved39[0x08]; + u32 refclk_i2c4_clkgenconfig; + u32 refclk_i2c4_clkgenstatus; + u8 _reserved40[0x08]; + u32 refclk_i2c5_clkgenconfig; + u32 refclk_i2c5_clkgenstatus; + u8 _reserved41[0x08]; + u32 refclk_sspa0_clkgenconfig; + u32 refclk_sspa0_clkgenstatus; + u8 _reserved42[0x08]; + u32 refclk_sspa1_clkgenconfig; + u32 refclk_sspa1_clkgenstatus; + u8 _reserved43[0x08]; + u32 refclk_sspa2_clkgenconfig; + u32 refclk_sspa2_clkgenstatus; + u8 _reserved44[0x08]; + u32 tsenclk_clkgenconfig; + u32 tsenclk_clkgenstatus; + u8 _reserved45[0x08]; + u32 ap_tsenclk_clkgenconfig; + u32 ap_tsenclk_clkgenstatus; + u8 _reserved46[0x08]; + u32 sspa_mclk_clkgenconfig; + u32 sspa_mclk_clkgenstatus; +}; + +check_member(mvmap2315_mpmu_clk_regs, sspa_mclk_clkgenstatus, 0x484); +static struct mvmap2315_mpmu_clk_regs * const mvmap2315_mpmu_clk + = (void *)MVMAP2315_MPMU_CLK_BASE; + +void clock_init_arm_generic_timer(void); +void configure_main_clk_pll(void); + +#endif /* __SOC_MARVELL_MVMAP2315_CLOCK_H__ */ diff --git a/src/soc/marvell/mvmap2315/include/soc/memlayout.ld b/src/soc/marvell/mvmap2315/include/soc/memlayout.ld new file mode 100644 index 0000000..665e4f5 --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/memlayout.ld @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <memlayout.h> +#include <arch/header.ld> + +SECTIONS +{ + DRAM_START(0x00000000) + +#if ENV_RAMSTAGE + TIMESTAMP(0x00060010, 128K) + STACK(0x00080010, 8K) +#endif + + VBOOT2_WORK(0x00082010, 16K) + VERSTAGE(0x1A0000, 128K) + POSTRAM_CBFS_CACHE(0x1C0000, 256K) + RAMSTAGE(0x00200000, 640K) + TTB(0x00300000, 1024K) + + SRAM_START(0xE0000000) + + /* The bootblock code won't actually be used, but the make process + * will fail if we don't provide a link address for it. Using LCM + * memory that is actually assigned to the bootROM so we don't + * use any LCM memory needed by coreboot code that will actually + * run. + */ + BOOTBLOCK(0xE0000000, 16K) + + /* The first 40K of LCM memory is reserved for the validated BDB + * as well as for bootROM usage when it is executing callbacks. + */ + + /* ROMSTAGE will be placed starting at the start of the second + * 32K segment in LCM. The Romstage code must not exceed 80KB, + * or it will encroach into LCM space reserved for APMU firmware + */ + ROMSTAGE(0xE0008000, 80K) + PRERAM_CBFS_CACHE(0xE001C000, 256) + PRERAM_CBMEM_CONSOLE(0xE001C100, 8K) + +#if ENV_ROMSTAGE + STACK(0xE001E100, 2K) + TIMESTAMP(0xE001E900, 1K) +#endif + + /* the folowing 2.5K are reserved for FIQ stack use + * memory address higher than 0xE001F700 + */ + + SRAM_END(0xE0020000) +} diff --git a/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h b/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h new file mode 100644 index 0000000..8c51367 --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__ +#define __SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__ + +#include <stdint.h> +#include <stdlib.h> + +#define MVMAP2315_DEVICE_SIZE 0x7E000000 +#define MVMAP2315_FLASH_SIZE 0x02000000 + +void mvmap2315_mmu_init(void); + +#endif /*__SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__*/ diff --git a/src/soc/marvell/mvmap2315/include/soc/monotonic_timer.h b/src/soc/marvell/mvmap2315/include/soc/monotonic_timer.h new file mode 100644 index 0000000..79c477b --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/monotonic_timer.h @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_MARVELL_MVMAP2315_MONOTONIC_TIMER_H__ +#define __SOC_MARVELL_MVMAP2315_MONOTONIC_TIMER_H__ + +#include <stdint.h> +#include <stdlib.h> +#include <types.h> + +#include <soc/addressmap.h> + +#define MVMAP2315_TIMER_T1CR_TE BIT(0) +#define MVMAP2315_TIMER_T1CR_TM BIT(1) +#define MVMAP2315_TIMER_T1CR_TIM BIT(2) +#define MVMAP2315_TIMER_T1CR_TPWM BIT(3) + +struct mvmap2315_timer_regs { + u32 t1lc; + u32 t1cv; + u32 t1cr; + u32 t1eoi; + u32 t1is; + u8 _reserved0[0x8c]; + u32 tis; + u32 teoi; + u32 tris; + u32 tcv; + u32 t1lc2; +}; + +check_member(mvmap2315_timer_regs, t1lc2, 0xB0); +static struct mvmap2315_timer_regs * const mvmap2315_timer0 + = (void *)MVMAP2315_TIMER0_BASE; + +void start_monotonic_timer(void); + +#endif /* __SOC_MARVELL_MVMAP2315_MONOTONIC_TIMER_H__ */ diff --git a/src/soc/marvell/mvmap2315/include/soc/power.h b/src/soc/marvell/mvmap2315/include/soc/power.h new file mode 100644 index 0000000..308f657 --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/power.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __SOC_MARVELL_MVMAP2315_POWER_H__ +#define __SOC_MARVELL_MVMAP2315_POWER_H__ + +#include <stdint.h> +#include <stdlib.h> + +enum boot_paths { + NO_BOOT = 0, + CHARGING_SCREEN = 1, + FULL_BOOT = 2 +}; + +void no_boot(void); +void full_boot(void); +void charging_screen(void); +void start_ap_cores(void *entry); +u32 get_boot_path(void); + +#endif /* __SOC_MARVELL_MVMAP2315_POWER_H__ */ diff --git a/src/soc/marvell/mvmap2315/include/soc/ramstage.h b/src/soc/marvell/mvmap2315/include/soc/ramstage.h new file mode 100644 index 0000000..61608cf --- /dev/null +++ b/src/soc/marvell/mvmap2315/include/soc/ramstage.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __SOC_MARVELL_MVMAP2315_RAMSTAGE_H__ +#define __SOC_MARVELL_MVMAP2315_RAMSTAGE_H__ + +#include <stdint.h> +#include <stdlib.h> + +void ramstage_entry(void); + +#endif /* __SOC_MARVELL_MVMAP2315_RAMSTAGE_H__ */ diff --git a/src/soc/marvell/mvmap2315/media.c b/src/soc/marvell/mvmap2315/media.c new file mode 100644 index 0000000..cafc85d --- /dev/null +++ b/src/soc/marvell/mvmap2315/media.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boot_device.h> +#include <soc/addressmap.h> +#include <symbols.h> + +static struct mem_region_device mdev = + MEM_REGION_DEV_INIT((void *)MVMAP2315_CBFS_BASE, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &mdev.rdev; +} diff --git a/src/soc/marvell/mvmap2315/mmu_operations.c b/src/soc/marvell/mvmap2315/mmu_operations.c new file mode 100644 index 0000000..105dd72 --- /dev/null +++ b/src/soc/marvell/mvmap2315/mmu_operations.c @@ -0,0 +1,46 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/cpu.h> +#include <device/device.h> +#include <memrange.h> +#include <arch/mmu.h> +#include <soc/addressmap.h> +#include <soc/mmu_operations.h> + +static void mvmap2315_mmu_config(void) +{ + const unsigned long ram_mem = MA_MEM | MA_NS | MA_RW; + const unsigned long dev_mem = MA_DEV | MA_S | MA_RW; + const unsigned long flash_mem = MA_MEM | MA_S | MA_RW; + + mmu_config_range((void *)MVMAP2315_RAM_BASE, (2UL * GiB), ram_mem); + + mmu_config_range((void *)(2UL * GiB), + MVMAP2315_DEVICE_SIZE, dev_mem); + + mmu_config_range((void *)MVMAP2315_FLASH_BASE, + MVMAP2315_FLASH_SIZE, flash_mem); +} + +void mvmap2315_mmu_init(void) +{ + mmu_init(); + + mvmap2315_mmu_config(); + + mmu_enable(); +} diff --git a/src/soc/marvell/mvmap2315/monotonic_timer.c b/src/soc/marvell/mvmap2315/monotonic_timer.c new file mode 100644 index 0000000..2316798 --- /dev/null +++ b/src/soc/marvell/mvmap2315/monotonic_timer.c @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <soc/monotonic_timer.h> +#include <timer.h> + +void start_monotonic_timer(void) +{ + u32 reg; + + reg = read32(&mvmap2315_timer0->t1cr); + + /* disable timer */ + reg &= ~MVMAP2315_TIMER_T1CR_TE; + /* set to free-running mode (loads max value at timer expiration) */ + reg &= ~MVMAP2315_TIMER_T1CR_TM; + /* mask interrupt (not currently used) */ + reg |= MVMAP2315_TIMER_T1CR_TIM; + /* disable PWM output */ + reg &= ~MVMAP2315_TIMER_T1CR_TPWM; + + write32(&mvmap2315_timer0->t1cr, reg); + + /* perform dummy read to clear all active interrupts */ + reg = read32(&mvmap2315_timer0->t1eoi); + + /* must provide an initial load count even in free-running mode */ + reg = read32(&mvmap2315_timer0->t1lc); + reg = 0xFFFFFFFF; + write32(&mvmap2315_timer0->t1lc, reg); + + /* enable timer */ + reg = read32(&mvmap2315_timer0->t1cr); + reg |= MVMAP2315_TIMER_T1CR_TE; + write32(&mvmap2315_timer0->t1cr, reg); + + /* busy wait until timer count is non-zero */ + while (!read32(&mvmap2315_timer0->t1cv)) + ; +} + +void timer_monotonic_get(struct mono_time *mt) +{ + u32 reg; + + /* invert count to change from down to up count */ + reg = ~read32(&mvmap2315_timer0->t1cv); + + mt->microseconds = (long)(reg / 13); +} diff --git a/src/soc/marvell/mvmap2315/power.c b/src/soc/marvell/mvmap2315/power.c new file mode 100644 index 0000000..578fb51 --- /dev/null +++ b/src/soc/marvell/mvmap2315/power.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/power.h> + +void start_ap_cores(void *entry) +{ + /*TODO: start_ap_cores */ +} + +void no_boot(void) +{ + /*TODO: impelement no_boot */ +} + +void charging_screen(void) +{ + /*TODO: impelement charging_screen */ +} + +void full_boot(void) +{ + /*TODO: impelement full_boot */ +} + +u32 get_boot_path(void) +{ + return FULL_BOOT; +} diff --git a/src/soc/marvell/mvmap2315/ramstage.c b/src/soc/marvell/mvmap2315/ramstage.c new file mode 100644 index 0000000..bd830c8 --- /dev/null +++ b/src/soc/marvell/mvmap2315/ramstage.c @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/stages.h> +#include <console/console.h> +#include <gic.h> +#include <soc/clock.h> +#include <soc/mmu_operations.h> +#include <soc/ramstage.h> + +void ramstage_entry(void) +{ + gic_init(); + + mvmap2315_mmu_init(); + + clock_init_arm_generic_timer(); + + /* Jump to boot state machine in common code. */ + main(); +} diff --git a/src/soc/marvell/mvmap2315/romstage.c b/src/soc/marvell/mvmap2315/romstage.c new file mode 100644 index 0000000..8924d01 --- /dev/null +++ b/src/soc/marvell/mvmap2315/romstage.c @@ -0,0 +1,78 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <program_loading.h> +#include <soc/assert.h> +#include <soc/clock.h> +#include <soc/monotonic_timer.h> +#include <soc/power.h> +#include <timestamp.h> + +/* + * main -- romstage main code. + * + */ +void main(void) +{ + u32 boot_path; + + configure_main_clk_pll(); + + timestamp_init(0); + + asm volatile ("bl cpu_enable_icache" : : : "r0", "r1"); + + asm volatile ("bl cpu_init" : : : "r0"); + + start_monotonic_timer(); + + timestamp_add_now(TS_START_ROMSTAGE); + + boot_path = get_boot_path(); + + switch (boot_path) { + case NO_BOOT: + no_boot(); + break; + + case CHARGING_SCREEN: + charging_screen(); + break; + + case FULL_BOOT: + full_boot(); + break; + } + + timestamp_add_now(TS_END_ROMSTAGE); + + run_ramstage(); +} + +static void romstage_continue(void) +{ + /* TODO: R4 Functionality to be added */ + while (1) + ; +} + +void platform_prog_run(struct prog *prog) +{ + if (!prog_entry(prog)) + __assert("ramstage entrypoint not found", __FILE__, __LINE__); + + start_ap_cores(prog_entry(prog)); + romstage_continue(); +} diff --git a/src/soc/marvell/mvmap2315/romstage_asm.S b/src/soc/marvell/mvmap2315/romstage_asm.S new file mode 100644 index 0000000..3fac9a5 --- /dev/null +++ b/src/soc/marvell/mvmap2315/romstage_asm.S @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/asm.h> + +# .balign 16 + +.arm +ENTRY(stage_entry) + blx _thumb_start +ENDPROC(stage_entry) + +.thumb +ENTRY(_thumb_start) + + ldr sp, =_estack + ldr r0, =_stack + ldr r1, =_estack + ldr r2, =0xdeadbeef +init_stack_loop: + str r2, [r0] + add r0, #4 + cmp r0, r1 + bne init_stack_loop + nop + + /* First arg: start of memory block */ + ldr a1, =_bss + + /* Second arg: fill value */ + mov a2, #0 + ldr a3, =_ebss + + /* Third arg: length of block */ + sub a3, a3, a1 + bl memset + + /* initializing FIQ stack */ + mrs r0, CPSR + mov r1, r0 + bic r1, r1, #0x40 + orr r0, r0, #0x51 + and r0, r0, #0xFFFFFFF1 + msr CPSR_c, r0 + ldr sp, =0xE001F700 + orr r0, r0, #0x10 + and r0, r0, #0xFFFFFFB0 + msr CPSR_cf, r1 + + /* call the code to authenticate this */ + bl main + /* should never return from this */ +ENDPROC(_thumb_start) diff --git a/src/soc/marvell/mvmap2315/soc.c b/src/soc/marvell/mvmap2315/soc.c new file mode 100644 index 0000000..a206e7b --- /dev/null +++ b/src/soc/marvell/mvmap2315/soc.c @@ -0,0 +1,46 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/cpu.h> +#include <device/device.h> + +static void soc_enable(device_t dev) +{ + /* Provide RAM resource for use by coreboot. Memory area needs to + * inclue load address for the payload. note that base and size are + * in Kbytes, so actual base and size are 0x10000000. + */ + + ram_resource(dev, 0, 0x0, CONFIG_RAMTOP / 1024); +} + +static struct device_operations soc_ops = { + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = soc_enable, + .init = DEVICE_NOOP, + .scan_bus = NULL, +}; + +static void enable_mvmap2315_dev(device_t dev) +{ + dev->ops = &soc_ops; +} + +struct chip_operations soc_marvell_mvmap2315_ops = { + CHIP_NAME("SOC Marvell MVMAP2315") + .enable_dev = enable_mvmap2315_dev, +}; diff --git a/src/soc/marvell/mvmap2315/stage_entry.S b/src/soc/marvell/mvmap2315/stage_entry.S new file mode 100644 index 0000000..1bdf2d6 --- /dev/null +++ b/src/soc/marvell/mvmap2315/stage_entry.S @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/asm.h> + +ENTRY(stage_entry) + + /* Initialize PSTATE, SCTLR and caches to clean state, set up stack. */ + bl arm64_init_cpu + + /* Jump to Tegra-specific C entry point. */ + bl ramstage_entry +ENDPROC(stage_entry) diff --git a/src/soc/marvell/mvmap2315/uart.c b/src/soc/marvell/mvmap2315/uart.c new file mode 100644 index 0000000..a486ee4 --- /dev/null +++ b/src/soc/marvell/mvmap2315/uart.c @@ -0,0 +1,46 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Google Inc. + * Copyright (C) 2016 Marvell, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/uart.h> +#include <boot/coreboot_tables.h> + +void uart_init(int idx) +{ + /*TODO: implement uart_init */ +} + +void uart_tx_byte(int idx, unsigned char data) +{ + /*TODO: implement uart_tx_byte */ +} + +void uart_tx_flush(int idx) +{ + /*TODO: implement uart_tx_flush */ +} + +unsigned char uart_rx_byte(int idx) +{ + /*TODO: implement uart_rx_byte */ + return 0; +} + +#if ENV_RAMSTAGE +void uart_fill_lb(void *data) +{ + /*TODO: implement uart_fill_lb */ +} +#endif
-
hakim giydan