Change in coreboot[master]: mb/google/volteer: Add type-c port info to coreboot table

[Nick Vaccaro (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57299 )

Change subject: mb/google/volteer: Add type-c port info to coreboot table
......................................................................

mb/google/volteer: Add type-c port info to coreboot table

This change adds type-c port information for USB Type-C ports to the
coreboot table.  This allows depthcharge to know the usb2 and usb3
port number assignments for each available port, as well as the SBU
and data line orientation for the board.

BUG=b:149830546
TEST='emerge-volteer coreboot chromeos-bootimage', flash and boot
volteer2 to kernel, log in and check cbmem for type-c info exported to
the payload:
  localhost ~ # cbmem -c | grep type-c
  Passing conn0 type-c info to payload: usb2:9 usb3:1 sbu:0 data:0
  Passing conn1 type-c info to payload: usb2:4 usb3:2 sbu:1 data:0

Change-Id: Id5686e5b3dfc6f12aa3f8938f371c14d0b2e490d
Signed-off-by: Nick Vaccaro 
---
M src/mainboard/google/volteer/mainboard.c
1 file changed, 36 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/57299/1

diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c
index 7426445..67fc001 100644
--- a/src/mainboard/google/volteer/mainboard.c
+++ b/src/mainboard/google/volteer/mainboard.c
@@ -1,8 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#include <console/console.h>
 #include <acpi/acpi.h>
 #include <baseboard/variants.h>
+#include <boot/coreboot_tables.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <drivers/spi/tpm/tpm.h>
 #include <ec/ec.h>
@@ -35,21 +36,14 @@
     * via fw_config + devicetree, i.e., change a register's value depending on fw_config
     * probing.
     */
-	const struct device *pmc;
    const struct device *mux;
    const struct device *conn;

-	pmc = pcidev_path_on_root(PCH_DEVFN_PMC);
-	if (!pmc || !pmc->link_list->children) {
-		printk(BIOS_ERR, "%s: unable to find PMC device or its mux\n", __func__);
-		return;
-	}
-
    /*
     * Find port 1 underneath PMC.MUX; some variants may not have this defined, so it's okay
     * to just silently return here.
     */
-	mux = pmc->link_list->children;
+	mux = conn_get_type_c_list();
    conn = dev_find_matching_device_on_bus(mux->link_list, is_port1);
    if (!conn)
    	return;
@@ -68,6 +62,39 @@
    }
 }

+int sysinfo_fill_type_c_info(struct type_c_config_info *info, uint32_t max_ports)
+{
+	const struct device *conn = NULL;
+	uint32_t count = 0;
+
+	/* Return if device doesn't have relevant Type-C ports */
+	if (!fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN2))
+			&& !fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE))
+			&& !fw_config_probe(FW_CONFIG(DB_USB, USB4_GEN3))
+			&& !fw_config_probe(FW_CONFIG(DB_USB, USB3_NO_A)))
+		return 0;
+
+	conn = conn_get_type_c_list();
+	while (conn != NULL) {
+		struct drivers_intel_pmc_mux_conn_config *config = conn->chip_info;
+
+		if (count >= max_ports)
+			break;
+
+		if (config) {
+			info[count].usb2_port_number = config->usb2_port_number;
+			info[count].usb3_port_number = config->usb3_port_number;
+			info[count].sbu_orientation = config->sbu_orientation;
+			info[count].data_orientation = config->hsl_orientation;
+			count++;
+		}
+
+		conn = conn->sibling;
+	}
+
+	return count;
+}
+
 static void mainboard_init(struct device *dev)
 {
    mainboard_ec_init();