Hello Felix Singer, Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/48602
to review the following change.
Change subject: nb/intel/sandybridge: Add comment to TC_RWP write ......................................................................
nb/intel/sandybridge: Add comment to TC_RWP write
Change-Id: I164daa59696f2fe8de3a4b3e7da46c7c723778eb Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/48602/1
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 9b364ab..a21caea 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1885,6 +1885,10 @@ int channel, slotrank; int err;
+ /* + * Set the DEC_WRD bit, required for the write flyby algorithm. + * Needs to be done before starting the write training procedure. + */ FOR_ALL_POPULATED_CHANNELS MCHBAR32_OR(TC_RWP_ch(channel), 1 << 27);
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48602 )
Change subject: nb/intel/sandybridge: Add comment to TC_RWP write ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/48602/2/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/48602/2/src/northbridge/intel/sandy... PS2, Line 1893: 1 << 27 might be worth adding a define for this (or a bitfield if you prefer that) for this in a follow-up patch
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48602 )
Change subject: nb/intel/sandybridge: Add comment to TC_RWP write ......................................................................
nb/intel/sandybridge: Add comment to TC_RWP write
Change-Id: I164daa59696f2fe8de3a4b3e7da46c7c723778eb Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/48602 Reviewed-by: Felix Held felix-coreboot@felixheld.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 9b364ab..a21caea 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1885,6 +1885,10 @@ int channel, slotrank; int err;
+ /* + * Set the DEC_WRD bit, required for the write flyby algorithm. + * Needs to be done before starting the write training procedure. + */ FOR_ALL_POPULATED_CHANNELS MCHBAR32_OR(TC_RWP_ch(channel), 1 << 27);
-
Angel Pons (Code Review) -
Felix Held (Code Review)