Attention is currently required from: Shelley Chen, Ravi kumar, Martin Roth, mturney mturney, Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52376 )
Change subject: HACK payloads: Add libpci for arm arch HACK ......................................................................
Patch Set 5:
(14 comments)
File payloads/libpayload/drivers/pci.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/a9ce2acf_76f019fd PS5, Line 57: #define PCIE_ATU_TYPE_IO (0x2 << 0) trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/010ced98_0cadfca4 PS5, Line 57: #define PCIE_ATU_TYPE_IO (0x2 << 0) please, no space before tabs
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/8e4727da_062c5acb PS5, Line 84: static void dw_pcie_writel_ob_unroll(void * atu_base, "foo * bar" should be "foo *bar"
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/150d22b0_ce1c51de PS5, Line 224: if (current_bus == 1) Statements should start on a tabstop
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/3ba09cfe_e91cd69e PS5, Line 231: trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/0eb36b4c_be2be634 PS5, Line 248: io_size); trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/0cff3e42_8eb6279a PS5, Line 253: u8 pci_read_config8(u32 dev, u16 reg) trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/b83926ba_7f561830 PS5, Line 254: { trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/466a4622_6b5ba549 PS5, Line 255: int val, offset = reg; trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/38a0c334_f3c6c93f PS5, Line 264: qcom_read_config(NVME_PCIE_BDF(1,0,0), reg, &val, 16); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/e160f56f_763fbd42 PS5, Line 264: qcom_read_config(NVME_PCIE_BDF(1,0,0), reg, &val, 16); space required after that ',' (ctx:VxV)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/3420cffe_2680b18d PS5, Line 268: u32 pci_read_config32(u32 dev, u16 reg) trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/32d3492d_8e98a233 PS5, Line 343: u16 reg = 0x10+ (bar * 4); need consistent spacing around '+' (ctx:VxW)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118007): https://review.coreboot.org/c/coreboot/+/52376/comment/cf085ed4_40f9bf22 PS5, Line 344: val = pci_read_config32(dev, reg ); space prohibited before that close parenthesis ')'
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build bot (Jenkins) (Code Review)