Bora Guvendik has uploaded this change for review. ( https://review.coreboot.org/27097
Change subject: soc/intel/apollolake: unify definition for spi base address ......................................................................
soc/intel/apollolake: unify definition for spi base address
Use SPI_BASE_ADDRESS instead of PRERAM_SPI_BASE_ADDRESS like big core in order make common code implementation straightforward.
Change-Id: Ibcb013fc95de29234253e89c9ca100cc468d44f6 Signed-off-by: Bora Guvendik bora.guvendik@intel.com --- M src/soc/intel/apollolake/bootblock/bootblock.c M src/soc/intel/apollolake/include/soc/iomap.h 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/27097/1
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 81843a4..09ea91e 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -106,7 +106,7 @@
enable_pm_timer_emulation();
- fast_spi_early_init(PRERAM_SPI_BASE_ADDRESS); + fast_spi_early_init(SPI_BASE_ADDRESS);
fast_spi_cache_bios_region();
diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h index 9a2500c..479882f 100644 --- a/src/soc/intel/apollolake/include/soc/iomap.h +++ b/src/soc/intel/apollolake/include/soc/iomap.h @@ -47,7 +47,7 @@ #define HECI1_BASE_ADDRESS 0xfed1a000
/* Temporary BAR for SPI until PCI enumeration assigns a BAR in ramstage. */ -#define PRERAM_SPI_BASE_ADDRESS 0xfe010000 +#define SPI_BASE_ADDRESS 0xfe010000 #define EARLY_GSPI_BASE_ADDRESS 0xfe011000
/* Temporary BAR for early I2C bus access */