Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31148
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
google/kukui: Set GPIO_RESET to output mode
In payloads, we didn't set GPIO modes. We have to set up GPIO mode in coreboot for payloads.
BUG=b:80501386 BRANCH=none TEST=HW reboot works in depthcharge
Change-Id: Ibd2c6c071871edc59497fbb245cdbec6a814f621 Signed-off-by: Tristan Shieh tristan.shieh@mediatek.com --- M src/mainboard/google/kukui/chromeos.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/31148/1
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c index 77c442f..132f0d3 100644 --- a/src/mainboard/google/kukui/chromeos.c +++ b/src/mainboard/google/kukui/chromeos.c @@ -24,6 +24,7 @@ { gpio_input_pullup(EC_IN_RW); gpio_input_pullup(EC_IRQ); + gpio_output(GPIO_RESET, 0); }
void fill_lb_gpios(struct lb_gpios *gpios)
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31148 )
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
Patch Set 1: Code-Review+2
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31148 )
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31148/1/src/mainboard/google/kukui/chromeos.... File src/mainboard/google/kukui/chromeos.c:
https://review.coreboot.org/#/c/31148/1/src/mainboard/google/kukui/chromeos.... PS1, Line 27: GPIO_RESET Can you add GPIO_RESET to the chromeos_gpios below as well?
We'll need it soon for Depthcharge to setup, either sysinfo_power or ATF param soon.
Tristan Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31148 )
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31148/1/src/mainboard/google/kukui/chromeos.... File src/mainboard/google/kukui/chromeos.c:
https://review.coreboot.org/#/c/31148/1/src/mainboard/google/kukui/chromeos.... PS1, Line 27: GPIO_RESET
Can you add GPIO_RESET to the chromeos_gpios below as well? […]
I do think about that when I add this setting.
However, I guess we will keep using ./src/drivers/power/psci.c in depthcharge, instead of ./src/drivers/power/sysinfo.c. In this case, I think we have to pass the gpio to ATF with param, not to depthcharge with chromeos_gpios[].
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31148 )
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31148/1/src/mainboard/google/kukui/chromeos.... File src/mainboard/google/kukui/chromeos.c:
https://review.coreboot.org/#/c/31148/1/src/mainboard/google/kukui/chromeos.... PS1, Line 27: GPIO_RESET
I do think about that when I add this setting. […]
Tristan is right, you don't really need it in lb_gpios.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31148 )
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
Patch Set 1: Code-Review+1
I was thinking that we can pass reset GPIO to sysinfo, then depthcharge can convert that into building param for BL31; and then realized today param is done by Coreboot so that does not make sense. Never mind.
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31148 )
Change subject: google/kukui: Set GPIO_RESET to output mode ......................................................................
google/kukui: Set GPIO_RESET to output mode
In payloads, we didn't set GPIO modes. We have to set up GPIO mode in coreboot for payloads.
BUG=b:80501386 BRANCH=none TEST=HW reboot works in depthcharge
Change-Id: Ibd2c6c071871edc59497fbb245cdbec6a814f621 Signed-off-by: Tristan Shieh tristan.shieh@mediatek.com Reviewed-on: https://review.coreboot.org/c/31148 Reviewed-by: Julius Werner jwerner@chromium.org Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/kukui/chromeos.c 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Hung-Te Lin: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c index 77c442f..132f0d3 100644 --- a/src/mainboard/google/kukui/chromeos.c +++ b/src/mainboard/google/kukui/chromeos.c @@ -24,6 +24,7 @@ { gpio_input_pullup(EC_IN_RW); gpio_input_pullup(EC_IRQ); + gpio_output(GPIO_RESET, 0); }
void fill_lb_gpios(struct lb_gpios *gpios)