Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74829 )
Change subject: soc/intel/tgl: Unhide PMC, IOM ACPI devices from OS ......................................................................
soc/intel/tgl: Unhide PMC, IOM ACPI devices from OS
These were hidden because no Windows drivers existed, but now that they do, the ACPI devices need to be visible in order for the drivers to properly attach.
TEST=build google/drobit, boot Windows, verify Windows drivers correctly attach to PCM/IOM devices.
Change-Id: I1520a71e318674baa234fc6a2126d1d17933d983 Signed-off-by: Matt DeVillier matt.devillier@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/74829 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: CoolStar coolstarorganization@gmail.com Reviewed-by: Sean Rhodes sean@starlabs.systems --- M src/soc/intel/tigerlake/acpi/tcss.asl M src/soc/intel/tigerlake/pmc.c 2 files changed, 23 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified CoolStar: Looks good to me, but someone else must approve Sean Rhodes: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index 98337a3..5af78ed 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -331,8 +331,7 @@ Name (_CRS, ResourceTemplate () { Memory32Fixed (ReadWrite, IOM_BASE_ADDRESS, IOM_BASE_SIZE) }) - /* Hide the device so that Windows does not complain on missing driver */ - Name (_STA, 0xB) + Name (_STA, 0xF) }
/* diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c index 5ad8a89..51d46f8 100644 --- a/src/soc/intel/tigerlake/pmc.c +++ b/src/soc/intel/tigerlake/pmc.c @@ -107,8 +107,7 @@
acpigen_write_name_string("_HID", PMC_HID); acpigen_write_name_string("_DDN", "Intel(R) Tiger Lake IPC Controller"); - /* Hide the device so that Windows does not complain on missing driver */ - acpigen_write_STA(ACPI_STATUS_DEVICE_HIDDEN_ON); + acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
/* * Part of the PCH's reserved 32 MB MMIO range (0xFC800000 - 0xFE7FFFFF).