Change in coreboot[master]: soc/intel/tigerlake: Use PMC IPC to disable HECI1

[Subrata Banik (Code Review)]

Attention is currently required from: Wonkyu Kim, Maulik V Vaghela, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai, Karthik Ramasubramanian.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61457 )

Change subject: soc/intel/tigerlake: Use PMC IPC to disable HECI1
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Patch Set 5:

(1 comment)

File src/soc/intel/tigerlake/smihandler.c:

https://review.coreboot.org/c/coreboot/+/61457/comment/b22db25c_9c5c1d98 
PS5, Line 19: if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
            : 		heci1_disable();
> Since this is now supposed to use PMC IPC, can we move it outside of SMM ?

Ack