Change in coreboot[master]: soc/sifive/fu540: Add opensbi support

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34142 )

Change subject: soc/sifive/fu540: Add opensbi support
......................................................................

soc/sifive/fu540: Add opensbi support

Change-Id: I35abacc16f244b95f9fd1947d1a5ea10c4dee097
Signed-off-by: Patrick Rudolph 
---
M src/soc/sifive/fu540/Kconfig
M src/soc/sifive/fu540/include/soc/memlayout.ld
2 files changed, 10 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/34142/1

diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig
index 6ebde33..dcf7896 100644
--- a/src/soc/sifive/fu540/Kconfig
+++ b/src/soc/sifive/fu540/Kconfig
@@ -49,4 +49,11 @@
    int
    default 0

+config OPENSBI_PLATFORM
+	string
+	default "sifive/fu540"
+
+config OPENSBI_TEXT_START
+	hex
+	default 0x80000000
 endif
diff --git a/src/soc/sifive/fu540/include/soc/memlayout.ld b/src/soc/sifive/fu540/include/soc/memlayout.ld
index b9b9c47..1d11aa0 100644
--- a/src/soc/sifive/fu540/include/soc/memlayout.ld
+++ b/src/soc/sifive/fu540/include/soc/memlayout.ld
@@ -31,6 +31,7 @@
    L2LIM_END(FU540_L2LIM + 2M)

DRAM_START(FU540_DRAM)
-	RAMSTAGE(FU540_DRAM, 256K)
-	MEM_STACK(FU540_DRAM + 256K, 20K)
+	REGION(opensbi, FU540_DRAM, 128K, 4K)
+	RAMSTAGE(FU540_DRAM + 128K, 256K)
+	MEM_STACK(FU540_DRAM + 448K, 20K)
 }

[Patrick Rudolph (Code Review)]

Hello ron minnich, Julius Werner, Jonathan Neuschäfer, build bot (Jenkins), Philipp Hug,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/34142

to look at the new patch set (#6).

Change subject: soc/sifive/fu540: Add opensbi support
......................................................................

soc/sifive/fu540: Add opensbi support

Tested on SiFive/unleashed:
Boots into Linux until earlycon terminates.

Change-Id: I35abacc16f244b95f9fd1947d1a5ea10c4dee097
Signed-off-by: Patrick Rudolph 
---
M src/soc/sifive/fu540/Kconfig
M src/soc/sifive/fu540/include/soc/memlayout.ld
2 files changed, 11 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/34142/6

[Philipp Deppenwiese (Code Review)]

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34142 )

Change subject: soc/sifive/fu540: Add opensbi support
......................................................................

Patch Set 6: Code-Review+2

[Patrick Rudolph (Code Review)]

Patrick Rudolph has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34142 )

Change subject: soc/sifive/fu540: Add opensbi support
......................................................................

soc/sifive/fu540: Add opensbi support

Tested on SiFive/unleashed:
Boots into Linux until earlycon terminates.

Change-Id: I35abacc16f244b95f9fd1947d1a5ea10c4dee097
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34142
Reviewed-by: Philipp Deppenwiese 
Tested-by: build bot (Jenkins) 
---
M src/soc/sifive/fu540/Kconfig
M src/soc/sifive/fu540/include/soc/memlayout.ld
2 files changed, 11 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Philipp Deppenwiese: Looks good to me, approved

diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig
index 82b42e5..97c67bf 100644
--- a/src/soc/sifive/fu540/Kconfig
+++ b/src/soc/sifive/fu540/Kconfig
@@ -24,6 +24,7 @@
    select DRIVERS_UART_SIFIVE
    select RISCV_USE_ARCH_TIMER
    select UART_OVERRIDE_REFCLK
+	select RISCV_HAS_OPENSBI

if SOC_SIFIVE_FU540

@@ -47,4 +48,11 @@
    int
    default 0

+config OPENSBI_PLATFORM
+	string
+	default "sifive/fu540"
+
+config OPENSBI_TEXT_START
+	hex
+	default 0x80000000
 endif
diff --git a/src/soc/sifive/fu540/include/soc/memlayout.ld b/src/soc/sifive/fu540/include/soc/memlayout.ld
index b9b9c47..1d11aa0 100644
--- a/src/soc/sifive/fu540/include/soc/memlayout.ld
+++ b/src/soc/sifive/fu540/include/soc/memlayout.ld
@@ -31,6 +31,7 @@
    L2LIM_END(FU540_L2LIM + 2M)

DRAM_START(FU540_DRAM)
-	RAMSTAGE(FU540_DRAM, 256K)
-	MEM_STACK(FU540_DRAM + 256K, 20K)
+	REGION(opensbi, FU540_DRAM, 128K, 4K)
+	RAMSTAGE(FU540_DRAM + 128K, 256K)
+	MEM_STACK(FU540_DRAM + 448K, 20K)
 }