yuchi.chen@intel.com has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85041?usp=email )
Change subject: soc/intel/common/block/gpmr: Add Kconfig item HAVE_GPMR_REGISTERS ......................................................................
soc/intel/common/block/gpmr: Add Kconfig item HAVE_GPMR_REGISTERS
General Purpose Memory Range registers may be not exposed on specific platforms, this patch adds a Kconfig item HAVE_GPMR_REGISTERS to select this feature.
Change-Id: I975840684b3dd9e9e76ec6a08de12d8dd3c8f08a Signed-off-by: Yuchi Chen yuchi.chen@intel.com --- M src/soc/intel/common/block/gpmr/Kconfig M src/soc/intel/common/block/gpmr/gpmr.c M src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h 3 files changed, 12 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/85041/1
diff --git a/src/soc/intel/common/block/gpmr/Kconfig b/src/soc/intel/common/block/gpmr/Kconfig index 313b0cc..d1d3a73bb 100644 --- a/src/soc/intel/common/block/gpmr/Kconfig +++ b/src/soc/intel/common/block/gpmr/Kconfig @@ -8,10 +8,16 @@
if SOC_INTEL_COMMON_BLOCK_GPMR
+config HAVE_GPMR_REGISTERS + bool + default y + help + Specify if the SoC has GPMR registers. + config USE_SOC_GPMR_DEFS bool default n help - Specify if the SoC have specific GPMR register definitions. + Specify if the SoC has specific GPMR register definitions.
endif diff --git a/src/soc/intel/common/block/gpmr/gpmr.c b/src/soc/intel/common/block/gpmr/gpmr.c index cef2e57..06ac5da 100644 --- a/src/soc/intel/common/block/gpmr/gpmr.c +++ b/src/soc/intel/common/block/gpmr/gpmr.c @@ -33,6 +33,7 @@ return pcr_or32(PID_DMI, offset, ordata); }
+#if CONFIG(HAVE_GPMR_REGISTERS) /* Check for available free gpmr */ static int get_available_gpmr(void) { @@ -85,3 +86,4 @@
return CB_SUCCESS; } +#endif diff --git a/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h b/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h index 98ee837..3cbfb69 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h +++ b/src/soc/intel/common/block/include/intelblocks/pcr_gpmr.h @@ -18,6 +18,7 @@ #define GPMR_TCOBASE 0x2778 #define GPMR_TCOEN (1 << 1)
+#if CONFIG(HAVE_GPMR_REGISTERS) #define MAX_GPMR_REGS 3
#define GPMR_OFFSET(x) (0x277c + (x) * 8) @@ -27,7 +28,8 @@
#define GPMR_DID_OFFSET(x) (0x2780 + (x) * 8) #define GPMR_EN BIT(31) +#endif /* CONFIG(HAVE_GPMR_REGISTERS) */
-#endif +#endif /* CONFIG(USE_SOC_GPMR_DEFS) */
#endif /* SOC_INTEL_COMMON_BLOCK_PCR_GPMR_H */