Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: [WIP] Enable -Wimplicit-fallthrough ......................................................................
[WIP] Enable -Wimplicit-fallthrough
Implicit fallthroughs are a perpetual source of Coverity issues, so let's use the compiler to stop them once and for all.
Signed-off-by: Jacob Garber jgarber1@ualberta.ca Change-Id: I1d75637a434a955a58d166ad203e49620d7395ed --- M Makefile.inc M src/console/vtxprintf.c M src/lib/edid.c M src/soc/rockchip/rk3288/sdram.c M src/southbridge/amd/agesa/hudson/hudson.c M src/southbridge/amd/cimx/sb900/lpc.c M src/southbridge/amd/sb700/lpc.c M src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c 14 files changed, 63 insertions(+), 67 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34297/1
diff --git a/Makefile.inc b/Makefile.inc index 28f1363..2cad230 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -401,7 +401,7 @@
CFLAGS_common += -pipe -g -nostdinc -std=gnu11 CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -Wimplicit-fallthrough CFLAGS_common += -Wstrict-aliasing -Wshadow -Wdate-time -Wtype-limits CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer CFLAGS_common += -ffunction-sections -fdata-sections -fno-pie diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index 848ad50..028e60c 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -271,6 +271,7 @@
case 'X': flags |= LARGE; + /* fallthrough */ case 'x': base = 16; break; diff --git a/src/lib/edid.c b/src/lib/edid.c index e2f213c..2594355 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -1207,14 +1207,16 @@ switch (edid[0x13]) { case 4: c.claims_one_point_four = 1; + /* fallthrough */ case 3: c.claims_one_point_three = 1; + /* fallthrough */ case 2: c.claims_one_point_two = 1; + /* fallthrough */ default: - break; + c.claims_one_point_oh = 1; } - c.claims_one_point_oh = 1; }
/* display section */ diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c index f5d1f74..57c2098 100644 --- a/src/soc/rockchip/rk3288/sdram.c +++ b/src/soc/rockchip/rk3288/sdram.c @@ -751,10 +751,8 @@ while ((read32(&ddr_publ_regs->pgsr) & PGSR_DLDONE) != PGSR_DLDONE) ; - /* if at low power state,need wakeup first, - * and then enter the config - * so here no break. - */ + /* if at low power state, need wakeup first, + and then enter the config, so here no break */ case ACCESS: case INIT_MEM: write32(&ddr_pctl_regs->sctl, CFG_STATE); diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c index 25997d2..e55a8ee 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.c +++ b/src/southbridge/amd/agesa/hudson/hudson.c @@ -117,21 +117,24 @@ case PCI_DEVFN(0x12, 0): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_12_0); - case PCI_DEVFN(0x12, 2): /* Fall through */ + /* Fall through */ + case PCI_DEVFN(0x12, 2): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_12_2); break; case PCI_DEVFN(0x13, 0): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_13_0); - case PCI_DEVFN(0x13, 2): /* Fall through */ + /* Fall through */ + case PCI_DEVFN(0x13, 2): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_13_2); break; case PCI_DEVFN(0x16, 0): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_16_0); - case PCI_DEVFN(0x16, 2): /* Fall through */ + /* Fall through */ + case PCI_DEVFN(0x16, 2): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_16_2); break; diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index b04ecfa..e669213 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -166,12 +166,14 @@ } pci_write_config32(dev, 0x44, reg); pci_write_config32(dev, 0x48, reg_x); - /* Set WideIO for as many IOs found (fall through is on purpose) */ + /* Set WideIO for as many IOs found */ switch (var_num) { case 2: pci_write_config16(dev, 0x90, reg_var[2]); + /* fallthrough */ case 1: pci_write_config16(dev, 0x66, reg_var[1]); + /* fallthrough */ case 0: //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata break; diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index 6f3be03..f679512 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -226,12 +226,14 @@ } pci_write_config32(dev, 0x44, reg); pci_write_config32(dev, 0x48, reg_x); - /* Set WideIO for as many IOs found (fall through is on purpose) */ + /* Set WideIO for as many IOs found */ switch (var_num) { case 2: pci_write_config16(dev, 0x90, reg_var[2]); + /* fallthrough */ case 1: pci_write_config16(dev, 0x66, reg_var[1]); + /* fallthrough */ case 0: pci_write_config16(dev, 0x64, reg_var[0]); break; diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c index caf817e..0db301b 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c @@ -225,25 +225,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -256,25 +256,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; @@ -679,25 +679,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -739,25 +739,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c index c76d228..ffb10b5 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c @@ -212,8 +212,7 @@ break; case TestPatternJD256B: k >>= 1; - // break is not being used here because TestPatternJD256B also need - // to run TestPatternJD256A sequence. + // fallthrough - TestPatternJD256B also need to run TestPatternJD256A sequence. case TestPatternJD256A: k >>= 3; ASSERT (k < sizeof (PatternJD_256)); @@ -221,8 +220,7 @@ break; case TestPatternJD1B: k >>= 1; - // break is not being used here because TestPatternJD1B also need - // to run TestPatternJD1A sequence. + // fallthrough - TestPatternJD1B also need to run TestPatternJD1A sequence. case TestPatternJD1A: k >>= 3; i = (UINT8) (k >> 3); diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c index 08b3a66..33aa56b 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c @@ -691,8 +691,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fallthrough - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence. case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -818,8 +817,7 @@ case AccessRdDqsDly: case AccessWrDatDly: Index += (Dimm * 0x100); - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fallthrough - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence. case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -967,8 +965,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fallthrough - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence. case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c index 95579cb..4973183 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c @@ -224,25 +224,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -255,25 +255,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // Fall through - advance the pointer after saving context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; @@ -678,25 +678,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -738,25 +738,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // Fall through - advance the pointer after restoring context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c index 322339d..ae02256 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c @@ -372,9 +372,7 @@ case 'X': Flags |= PREFIX_ZERO; Width = sizeof (UINT64) * 2; - // - // break skipped on purpose - // + // fallthrough case 'x': if ((Flags & LONG_TYPE) == LONG_TYPE) { Value = VA_ARG (Marker, UINT64); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c index 41ba55c..5590859 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c @@ -211,8 +211,7 @@ break; case TestPatternJD256B: k >>= 1; - // break is not being used here because TestPatternJD256B also need - // to run TestPatternJD256A sequence. + // fallthrough - TestPatternJD256B also need to run TestPatternJD256A sequence. case TestPatternJD256A: k >>= 3; ASSERT (k < sizeof (PatternJD_256)); @@ -220,8 +219,7 @@ break; case TestPatternJD1B: k >>= 1; - // break is not being used here because TestPatternJD1B also need - // to run TestPatternJD1A sequence. + // fallthrough - TestPatternJD1B also need to run TestPatternJD1A sequence. case TestPatternJD1A: k >>= 3; i = (UINT8) (k >> 3); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c index 060269e..b2fc1f9 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c @@ -693,8 +693,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fallthrough - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence. case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -820,8 +819,7 @@ case AccessRdDqsDly: case AccessWrDatDly: Index += (Dimm * 0x100); - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fallthrough - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence. case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -975,8 +973,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fallthrough - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence. case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4);
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: [WIP] Enable -Wimplicit-fallthrough ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
This change is ready for review.
https://review.coreboot.org/c/coreboot/+/34297/2/src/southbridge/amd/agesa/h... File src/southbridge/amd/agesa/hudson/hudson.c:
https://review.coreboot.org/c/coreboot/+/34297/2/src/southbridge/amd/agesa/h... PS2, Line 120: Fall nit: capitalization intentional?
Hello Julius Werner, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34297
to look at the new patch set (#3).
Change subject: [WIP] src: Remove implicit fall throughs ......................................................................
[WIP] src: Remove implicit fall throughs
Implicit fall throughs are a perpetual source of Coverity issues, so let's squash them once and for all.
Change-Id: I1d75637a434a955a58d166ad203e49620d7395ed Signed-off-by: Jacob Garber jgarber1@ualberta.ca --- M Makefile.inc M src/console/vtxprintf.c M src/lib/edid.c M src/soc/nvidia/tegra124/sor.c M src/soc/rockchip/rk3288/sdram.c M src/southbridge/amd/agesa/hudson/hudson.c M src/southbridge/amd/cimx/sb800/lpc.c M src/southbridge/amd/cimx/sb900/lpc.c M src/southbridge/amd/sb700/lpc.c M src/southbridge/amd/sb800/lpc.c M src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c 25 files changed, 108 insertions(+), 114 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34297/3
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: [WIP] src: Remove implicit fall throughs ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34297/2/src/southbridge/amd/agesa/h... File src/southbridge/amd/agesa/hudson/hudson.c:
https://review.coreboot.org/c/coreboot/+/34297/2/src/southbridge/amd/agesa/h... PS2, Line 120: Fall
nit: capitalization intentional?
No, I'll change that
Hello Julius Werner, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34297
to look at the new patch set (#4).
Change subject: src: Make implicit fall throughs explicit ......................................................................
src: Make implicit fall throughs explicit
Implicit fall throughs are a perpetual source of bugs and Coverity Scan issues, so let's squash them once and for all. GCC can flag implicit fall throughs using the -Wimplicit-fallthrough warning, and this should ensure no more enter the code base. However, many fall throughs are intentional, and we can use the following comment style to have GCC suppress the warning.
switch (x) { case 1: y += 1; /* fall through */ case 2: y += 2; /* fall through - but this time with an explanation */ default: y += 3; }
This patch adds comments for all remaining intentional fall throughs, and tweaks some existing fall through comments to fit the syntax that GCC expects.
Change-Id: I1d75637a434a955a58d166ad203e49620d7395ed Signed-off-by: Jacob Garber jgarber1@ualberta.ca --- M src/console/vtxprintf.c M src/lib/edid.c M src/soc/nvidia/tegra124/sor.c M src/soc/rockchip/rk3288/sdram.c M src/southbridge/amd/agesa/hudson/hudson.c M src/southbridge/amd/cimx/sb800/lpc.c M src/southbridge/amd/cimx/sb900/lpc.c M src/southbridge/amd/sb700/lpc.c M src/southbridge/amd/sb800/lpc.c M src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c 24 files changed, 107 insertions(+), 113 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34297/4
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 4: Code-Review+2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 4: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 4: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 4:
(13 comments)
Sorry to bother you with my OCD (Obsessive Consistency Disorder)
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 228: F My OCD kindly says: Please be consistent, the rest of instances are not capitalized. :)
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 820: fallthrough Missing a space!
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 230: F More capitalized inconsistency ;-;
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 676: F Same
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 736: F Same
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 227: F Same (this looks familiar...)
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 681: F Same
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 741: F Same
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 214: fallthrough Missing a space?
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 222: fallthrough ditto
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 227: F Same (how many copies of this file do we have?)
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 681: F Same
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 741: F Same
Hello HAOUAS Elyes, Julius Werner, David Hendricks, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34297
to look at the new patch set (#5).
Change subject: src: Make implicit fall throughs explicit ......................................................................
src: Make implicit fall throughs explicit
Implicit fall throughs are a perpetual source of bugs and Coverity Scan issues, so let's squash them once and for all. GCC can flag implicit fall throughs using the -Wimplicit-fallthrough warning, and this should ensure no more enter the code base. However, many fall throughs are intentional, and we can use the following comment style to have GCC suppress the warning.
switch (x) { case 1: y += 1; /* fall through */ case 2: y += 2; /* fall through - but this time with an explanation */ default: y += 3; }
This patch adds comments for all remaining intentional fall throughs, and tweaks some existing fall through comments to fit the syntax that GCC expects.
Change-Id: I1d75637a434a955a58d166ad203e49620d7395ed Signed-off-by: Jacob Garber jgarber1@ualberta.ca --- M src/console/vtxprintf.c M src/lib/edid.c M src/soc/nvidia/tegra124/sor.c M src/soc/rockchip/rk3288/sdram.c M src/southbridge/amd/agesa/hudson/hudson.c M src/southbridge/amd/cimx/sb800/lpc.c M src/southbridge/amd/cimx/sb900/lpc.c M src/southbridge/amd/sb700/lpc.c M src/southbridge/amd/sb800/lpc.c M src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c 24 files changed, 107 insertions(+), 113 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34297/5
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 5: Code-Review+2
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 5:
(13 comments)
OCD is good ;)
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 228: F
My OCD kindly says: Please be consistent, the rest of instances are not capitalized. […]
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 820: fallthrough
Missing a space!
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 230: F
More capitalized inconsistency ;-;
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 676: F
Same
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 736: F
Same
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 227: F
Same (this looks familiar... […]
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 681: F
Same
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 741: F
Same
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 214: fallthrough
Missing a space?
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 222: fallthrough
ditto
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... File src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c:
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 227: F
Same (how many copies of this file do we have?)
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 681: F
Same
Done
https://review.coreboot.org/c/coreboot/+/34297/4/src/vendorcode/amd/agesa/f1... PS4, Line 741: F
Same
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 5: Code-Review+2
Thanks :)
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 5:
Looks like this needs a manual rebase.
Hello HAOUAS Elyes, Angel Pons, Julius Werner, David Hendricks, Paul Menzel, build bot (Jenkins), Martin Roth, Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34297
to look at the new patch set (#6).
Change subject: src: Make implicit fall throughs explicit ......................................................................
src: Make implicit fall throughs explicit
Implicit fall throughs are a perpetual source of bugs and Coverity Scan issues, so let's squash them once and for all. GCC can flag implicit fall throughs using the -Wimplicit-fallthrough warning, and this should ensure no more enter the code base. However, many fall throughs are intentional, and we can use the following comment style to have GCC suppress the warning.
switch (x) { case 1: y += 1; /* fall through */ case 2: y += 2; /* fall through - but this time with an explanation */ default: y += 3; }
This patch adds comments for all remaining intentional fall throughs, and tweaks some existing fall through comments to fit the syntax that GCC expects.
Change-Id: I1d75637a434a955a58d166ad203e49620d7395ed Signed-off-by: Jacob Garber jgarber1@ualberta.ca --- M src/console/vtxprintf.c M src/lib/edid.c M src/soc/nvidia/tegra124/sor.c M src/soc/rockchip/rk3288/sdram.c M src/southbridge/amd/agesa/hudson/hudson.c M src/southbridge/amd/cimx/sb800/lpc.c M src/southbridge/amd/cimx/sb900/lpc.c M src/southbridge/amd/sb700/lpc.c M src/southbridge/amd/sb800/lpc.c M src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c 24 files changed, 107 insertions(+), 113 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/34297/6
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 6: Code-Review+2
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34297/2/src/southbridge/amd/agesa/h... File src/southbridge/amd/agesa/hudson/hudson.c:
https://review.coreboot.org/c/coreboot/+/34297/2/src/southbridge/amd/agesa/h... PS2, Line 120: Fall
No, I'll change that
Done
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34297 )
Change subject: src: Make implicit fall throughs explicit ......................................................................
src: Make implicit fall throughs explicit
Implicit fall throughs are a perpetual source of bugs and Coverity Scan issues, so let's squash them once and for all. GCC can flag implicit fall throughs using the -Wimplicit-fallthrough warning, and this should ensure no more enter the code base. However, many fall throughs are intentional, and we can use the following comment style to have GCC suppress the warning.
switch (x) { case 1: y += 1; /* fall through */ case 2: y += 2; /* fall through - but this time with an explanation */ default: y += 3; }
This patch adds comments for all remaining intentional fall throughs, and tweaks some existing fall through comments to fit the syntax that GCC expects.
Change-Id: I1d75637a434a955a58d166ad203e49620d7395ed Signed-off-by: Jacob Garber jgarber1@ualberta.ca Reviewed-on: https://review.coreboot.org/c/coreboot/+/34297 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/console/vtxprintf.c M src/lib/edid.c M src/soc/nvidia/tegra124/sor.c M src/soc/rockchip/rk3288/sdram.c M src/southbridge/amd/agesa/hudson/hudson.c M src/southbridge/amd/cimx/sb800/lpc.c M src/southbridge/amd/cimx/sb900/lpc.c M src/southbridge/amd/sb700/lpc.c M src/southbridge/amd/sb800/lpc.c M src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c M src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c M src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c M src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c 24 files changed, 107 insertions(+), 113 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c index 848ad50..f34c91b 100644 --- a/src/console/vtxprintf.c +++ b/src/console/vtxprintf.c @@ -271,6 +271,7 @@
case 'X': flags |= LARGE; + /* fall through */ case 'x': base = 16; break; diff --git a/src/lib/edid.c b/src/lib/edid.c index e2f213c..3b81b5c 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -1207,14 +1207,16 @@ switch (edid[0x13]) { case 4: c.claims_one_point_four = 1; + /* fall through */ case 3: c.claims_one_point_three = 1; + /* fall through */ case 2: c.claims_one_point_two = 1; + /* fall through */ default: - break; + c.claims_one_point_oh = 1; } - c.claims_one_point_oh = 1; }
/* display section */ diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c index 3bc50e8..52b909e 100644 --- a/src/soc/nvidia/tegra124/sor.c +++ b/src/soc/nvidia/tegra124/sor.c @@ -237,6 +237,7 @@ /* fall through */ case 2: reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO; + /* fall through */ case 1: reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO; break; diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c index 53c594a..74038b0 100644 --- a/src/soc/rockchip/rk3288/sdram.c +++ b/src/soc/rockchip/rk3288/sdram.c @@ -751,10 +751,8 @@ while ((read32(&ddr_publ_regs->pgsr) & PGSR_DLDONE) != PGSR_DLDONE) ; - /* if at low power state,need wakeup first, - * and then enter the config - * so here no break. - */ + /* if at low power state, need wakeup first, then enter the config */ + /* fall through */ case ACCESS: case INIT_MEM: write32(&ddr_pctl_regs->sctl, CFG_STATE); diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c index 25997d2..4c06e87 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.c +++ b/src/southbridge/amd/agesa/hudson/hudson.c @@ -117,21 +117,24 @@ case PCI_DEVFN(0x12, 0): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_12_0); - case PCI_DEVFN(0x12, 2): /* Fall through */ + /* fall through */ + case PCI_DEVFN(0x12, 2): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_12_2); break; case PCI_DEVFN(0x13, 0): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_13_0); - case PCI_DEVFN(0x13, 2): /* Fall through */ + /* fall through */ + case PCI_DEVFN(0x13, 2): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_13_2); break; case PCI_DEVFN(0x16, 0): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_16_0); - case PCI_DEVFN(0x16, 2): /* Fall through */ + /* fall through */ + case PCI_DEVFN(0x16, 2): if (dev->enabled == 0) hudson_disable_usb(USB_EN_DEVFN_16_2); break; diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c index 483d185..79f4029 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.c +++ b/src/southbridge/amd/cimx/sb800/lpc.c @@ -172,8 +172,10 @@ switch (var_num) { case 3: pci_write_config16(dev, 0x90, reg_var[2]); + /* fall through */ case 2: pci_write_config16(dev, 0x66, reg_var[1]); + /* fall through */ case 1: //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata break; diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index 8fcb947..8e7c1cc 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -170,8 +170,10 @@ switch (var_num) { case 3: pci_write_config16(dev, 0x90, reg_var[2]); + /* fall through */ case 2: pci_write_config16(dev, 0x66, reg_var[1]); + /* fall through */ case 1: //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata break; diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c index b7f0dc3..eb171e6 100644 --- a/src/southbridge/amd/sb700/lpc.c +++ b/src/southbridge/amd/sb700/lpc.c @@ -230,8 +230,10 @@ switch (var_num) { case 3: pci_write_config16(dev, 0x90, reg_var[2]); + /* fall through */ case 2: pci_write_config16(dev, 0x66, reg_var[1]); + /* fall through */ case 1: pci_write_config16(dev, 0x64, reg_var[0]); break; diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c index 74b6374..580138a 100644 --- a/src/southbridge/amd/sb800/lpc.c +++ b/src/southbridge/amd/sb800/lpc.c @@ -222,8 +222,10 @@ switch (var_num) { case 3: pci_write_config16(dev, 0x90, reg_var[2]); + /* fall through */ case 2: pci_write_config16(dev, 0x66, reg_var[1]); + /* fall through */ case 1: pci_write_config16(dev, 0x64, reg_var[0]); break; diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c index caf817e..0897123 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c @@ -225,25 +225,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -256,25 +256,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; @@ -679,25 +679,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -739,25 +739,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c index c76d228..a6d7bb1 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c @@ -212,8 +212,7 @@ break; case TestPatternJD256B: k >>= 1; - // break is not being used here because TestPatternJD256B also need - // to run TestPatternJD256A sequence. + // fall through - TestPatternJD256B also need to run TestPatternJD256A sequence case TestPatternJD256A: k >>= 3; ASSERT (k < sizeof (PatternJD_256)); @@ -221,8 +220,7 @@ break; case TestPatternJD1B: k >>= 1; - // break is not being used here because TestPatternJD1B also need - // to run TestPatternJD1A sequence. + // fall through - TestPatternJD1B also need to run TestPatternJD1A sequence case TestPatternJD1A: k >>= 3; i = (UINT8) (k >> 3); diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c index 08b3a66..d84e417 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c @@ -691,8 +691,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -818,8 +817,7 @@ case AccessRdDqsDly: case AccessWrDatDly: Index += (Dimm * 0x100); - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -967,8 +965,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c index a1393be..6d12752 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/S3.c @@ -227,25 +227,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -258,25 +258,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; @@ -673,25 +673,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -733,25 +733,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c index 88b85df..da0eb95 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c +++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/muc.c @@ -213,8 +213,7 @@ break; case TestPatternJD256B: k >>= 1; - // break is not being used here because TestPatternJD256B also need - // to run TestPatternJD256A sequence. + // fall through - TestPatternJD256B also need to run TestPatternJD256A sequence case TestPatternJD256A: k >>= 3; ASSERT (k < sizeof (PatternJD_256)); @@ -222,8 +221,7 @@ break; case TestPatternJD1B: k >>= 1; - // break is not being used here because TestPatternJD1B also need - // to run TestPatternJD1A sequence. + // fall through - TestPatternJD1B also need to run TestPatternJD1A sequence case TestPatternJD1A: k >>= 3; i = (UINT8) (k >> 3); diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c index 4045289..a312687 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c +++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnphy.c @@ -695,8 +695,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -822,8 +821,7 @@ case AccessRdDqsDly: case AccessWrDatDly: Index += (Dimm * 0x100); - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c index 95579cb..9152bee 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/S3.c @@ -224,25 +224,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -255,25 +255,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; @@ -678,25 +678,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -738,25 +738,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c index 322339d..5c3e312 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/IDS/Debug/IdsDebugPrint.c @@ -372,9 +372,7 @@ case 'X': Flags |= PREFIX_ZERO; Width = sizeof (UINT64) * 2; - // - // break skipped on purpose - // + // fall through case 'x': if ((Flags & LONG_TYPE) == LONG_TYPE) { Value = VA_ARG (Marker, UINT64); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c index 41ba55c..a9aa5ca 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/muc.c @@ -211,8 +211,7 @@ break; case TestPatternJD256B: k >>= 1; - // break is not being used here because TestPatternJD256B also need - // to run TestPatternJD256A sequence. + // fall through - TestPatternJD256B also need to run TestPatternJD256A sequence case TestPatternJD256A: k >>= 3; ASSERT (k < sizeof (PatternJD_256)); @@ -220,8 +219,7 @@ break; case TestPatternJD1B: k >>= 1; - // break is not being used here because TestPatternJD1B also need - // to run TestPatternJD1A sequence. + // fall through - TestPatternJD1B also need to run TestPatternJD1A sequence case TestPatternJD1A: k >>= 3; i = (UINT8) (k >> 3); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c index 060269e..076f443 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/NB/mnphy.c @@ -693,8 +693,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -820,8 +819,7 @@ case AccessRdDqsDly: case AccessWrDatDly: Index += (Dimm * 0x100); - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); @@ -975,8 +973,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4); diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c index ed94e79..ccc7343 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbUtilities.c @@ -242,9 +242,11 @@ case CORE_LEVEL_COMPUTE_UNIT_THREE: TempVar32_a = TempVar32_a << 1; CoresPerComputeUnit++; + // fall through case CORE_LEVEL_COMPUTE_UNIT_TWO: TempVar32_a = TempVar32_a << 1; CoresPerComputeUnit++; + // fall through case CORE_LEVEL_COMPUTE_UNIT: TempVar32_a = (TempVar32_a << 1) - 1; TempVar32_a = FOUR_CORE_COMPUTE_UNIT_BITMAP & (~TempVar32_a); diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c index 4b6128e..42aebb6 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/S3.c @@ -224,25 +224,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -255,25 +255,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: SavePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: SaveConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: SaveMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: SaveConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMask); - // Fall through to advance the pointer after saving context + // fall through - advance the pointer after saving context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; @@ -678,25 +678,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI_PRE_ESR: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI: Device.PciDevice++; break; case DEV_TYPE_CPCI_PRE_ESR: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI: Device.CPciDevice++; break; case DEV_TYPE_MSR_PRE_ESR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR: Device.MsrDevice++; break; case DEV_TYPE_CMSR_PRE_ESR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR: Device.CMsrDevice++; break; @@ -738,25 +738,25 @@ switch (Device.CommonDeviceHeader->Type) { case DEV_TYPE_PCI: RestorePciDevice (StdHeader, Device.PciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_PCI_PRE_ESR: Device.PciDevice++; break; case DEV_TYPE_CPCI: RestoreConditionalPciDevice (StdHeader, Device.CPciDevice, CallPoint, &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CPCI_PRE_ESR: Device.CPciDevice++; break; case DEV_TYPE_MSR: RestoreMsrDevice (StdHeader, Device.MsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_MSR_PRE_ESR: Device.MsrDevice++; break; case DEV_TYPE_CMSR: RestoreConditionalMsrDevice (StdHeader, Device.CMsrDevice, CallPoint, (UINT64 **) &OrMaskPtr); - // Fall through to advance the pointer after restoring context + // fall through - advance the pointer after restoring context case DEV_TYPE_CMSR_PRE_ESR: Device.CMsrDevice++; break; diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c index 4163d82..c3e4ade 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/IDS/Debug/IdsDebugPrint.c @@ -375,9 +375,7 @@ case 'X': Flags |= PREFIX_ZERO; Width = sizeof (UINT64) * 2; - // - // break skipped on purpose - // + // fall through case 'x': if ((Flags & LONG_TYPE) == LONG_TYPE) { Value = VA_ARG (Marker, UINT64); diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c index 8d81773..980cd33 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/muc.c @@ -211,8 +211,7 @@ break; case TestPatternJD256B: k >>= 1; - // break is not being used here because TestPatternJD256B also need - // to run TestPatternJD256A sequence. + // fall through - TestPatternJD256B also need to run TestPatternJD256A sequence case TestPatternJD256A: k >>= 3; ASSERT (k < sizeof (PatternJD_256)); @@ -220,8 +219,7 @@ break; case TestPatternJD1B: k >>= 1; - // break is not being used here because TestPatternJD1B also need - // to run TestPatternJD1A sequence. + // fall through - TestPatternJD1B also need to run TestPatternJD1A sequence case TestPatternJD1A: k >>= 3; i = (UINT8) (k >> 3); diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c index 356d4e3..c20d5a2 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/NB/mnphy.c @@ -487,8 +487,7 @@ } else if (Rank) { Index += 0x60; } - // break is not being used here because AccessRdDqsDly and AccessWrDatDly also need - // to run AccessPhRecDly sequence. + // fall through - AccessRdDqsDly and AccessWrDatDly also need to run AccessPhRecDly sequence case AccessPhRecDly: Index += (Byte / 4); Offset = 8 * (Byte % 4);
-
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