the following patch was just integrated into master: commit df369af79e98960afde403d4375ed03f1a648e2a Author: Patrick Rudolph siro@das-labor.org Date: Mon Jan 2 18:41:37 2017 +0100
sb/intel/common/gpio: Support ICH9M and prior
Write gpio level twice to make sure the level is set after pins have been configred as GPIO and to minimize glitches on newer hardware.
Required to set correct GPIO layout on T500.
Tested on T500.
Change-Id: I691e672c7cb52ca51a80fd29657ada7488db0d41 Signed-off-by: Patrick Rudolph siro@das-labor.org Reviewed-on: https://review.coreboot.org/18012 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins)
See https://review.coreboot.org/18012 for details.
-gerrit