Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86001?usp=email )
Change subject: drivers/intel/fsp2_0: Add option to control debug log level using CBFS ......................................................................
drivers/intel/fsp2_0: Add option to control debug log level using CBFS
This commit relies on newly added Kconfig option, USE_CBFS_FILE_OPTION_BACKEND, which allows controlling the FSP debug log level using CBFS options (RAW binary files).
The default log-level is setup in coreboot while stitching the CBFS option binaries depending upon the coreboot log-level.
Following files will be used to determine the log levels:
- fsp_pcd_debug_level: For the overall FSP debug log level.
- fsp_mrc_debug_level: For the MRC (Memory Reference Code) debug log level.
In absense of these files, the FSP console log-level is determine by calling into fsp_map_console_log_level API.
The values in these files should correspond to the FSP_LOG_LEVEL_* enum values.
This change allows for more flexibility in controlling the FSP debug log level, especially in cases of debugging silicon firmware issues with a debug AP FW binary.
This capability is particularly useful when debugging issues that require examining both silicon and MRC logs simultaneously.
BUG=b:227151510 TEST=Able to control the FSP debug log based on CBFS options
To inject the fsp_pcd_debug_level and fsp_mrc_debug_level CBFS files with the desired log level, run:
``` cbfstool image-fatcat.serial.bin add-int -i 5 -n option/fsp_pcd_debug_level
cbfstool image-fatcat.serial.bin add-int -i 5 -n option/fsp_mrc_debug_level ```
With both fsp_pcd_debug_level and fsp_mrc_debug_level present in the RO CBFS, both the silicon firmware and MRC behave as debug binaries.
To verify the presence of both log-level RAW CBFS binaries in the CBFS RO slot, run:
``` sudo cbfstool fatcat/image-rex0.serial.bin print | grep fsp_ ```
This should output:
``` option/fsp_mrc_debug_level 0x88e40 raw 8 none option/fsp_pcd_debug_level 0x2a7400 raw 8 none ```
Change-Id: I2c14d26021dd0048fa24024119df857e216f18bd Signed-off-by: Subrata Banik subratabanik@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/86001 Reviewed-by: Jérémy Compostella jeremy.compostella@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kapil Porwal kapilporwal@google.com --- M src/drivers/intel/fsp2_0/debug.c M src/drivers/intel/fsp2_0/include/fsp/debug.h 2 files changed, 52 insertions(+), 0 deletions(-)
Approvals: Jérémy Compostella: Looks good to me, approved build bot (Jenkins): Verified Kapil Porwal: Looks good to me, approved
diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c index 9dc964d..431618c 100644 --- a/src/drivers/intel/fsp2_0/debug.c +++ b/src/drivers/intel/fsp2_0/debug.c @@ -6,6 +6,7 @@ #include <cpu/x86/mtrr.h> #include <fsp/debug.h> #include <fsp/util.h> +#include <option.h>
enum fsp_call_phase { BEFORE_FSP_CALL, @@ -178,3 +179,13 @@
display_mtrrs(); } + +enum fsp_log_level fsp_get_pcd_debug_log_level(void) +{ + return get_uint_option("fsp_pcd_debug_level", fsp_map_console_log_level()); +} + +enum fsp_log_level fsp_get_mrc_debug_log_level(void) +{ + return get_uint_option("fsp_mrc_debug_level", fsp_map_console_log_level()); +} diff --git a/src/drivers/intel/fsp2_0/include/fsp/debug.h b/src/drivers/intel/fsp2_0/include/fsp/debug.h index e7f9f25..c7c2990 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/debug.h +++ b/src/drivers/intel/fsp2_0/include/fsp/debug.h @@ -63,4 +63,45 @@ /* Callback to verify that current GPIO configuration matches the saved snapshot */ size_t gpio_verify_snapshot(void);
+/* + * Retrieve fsp_pcd_debug_level file from option backend (e.g. CBFS) to identify the log-level + * used for outputting FSP debug messages. + * + * 1. Critical errors, need action etc., FSP_LOG_LEVEL_ERR aka value 1 + * 2. #1 including warnings, FSP_LOG_LEVEL_ERR_WARN aka value 2 + * 3. #2 including additional informational messages, FSP_LOG_LEVEL_ERR_WARN_INFO aka value 3 + * + * The default log-level is setup in coreboot while stitching the CBFS option binaries + * depending upon the coreboot log-level. One can override that using below example: + * + * Here is an example of adding fsp_pcd_debug_level option binary file into the RO-CBFS + * to specify the FSP log-level: + * - cbfstool <AP FW image> add-int -i <log-level> -n option/fsp_pcd_debug_level + * + * If OPTION_BACKEND_NONE then the then, use log levels will be determined by + * calling into fsp_map_console_log_level API. + */ +enum fsp_log_level fsp_get_pcd_debug_log_level(void); +/* + * Retrieve fsp_mrc_debug_level file from option backend (e.g. CBFS) to identify the log-level + * used for outputting FSP debug messages. + * + * 1. Critical errors, need action etc., FSP_LOG_LEVEL_ERR aka value 1 + * 2. #1 including warnings, FSP_LOG_LEVEL_ERR_WARN aka value 2 + * 3. #2 including additional informational messages, FSP_LOG_LEVEL_ERR_WARN_INFO aka value 3 + * 4. #3 including event logs, FSP_LOG_LEVEL_ERR_WARN_INFO_EVENT aka value 4 + * 5. Use FSP_LOG_LEVEL_VERBOSE aka 5 for all types of debug messages. + * + * The default log-level is setup in coreboot while stitching the CBFS option binaries + * depending upon the coreboot log-level. One can override that using below example: + * + * Here is an example of adding fsp_mrc_debug_level option binary file into the RO-CBFS + * to specify the FSP log-level: + * - cbfstool <AP FW image> add-int -i <log-level> -n option/fsp_mrc_debug_level + * + * If OPTION_BACKEND_NONE then the then, use log levels will be determined by + * calling into fsp_map_console_log_level API. + */ +enum fsp_log_level fsp_get_mrc_debug_log_level(void); + #endif /* _FSP2_0_DEBUG_H_ */