Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81457?usp=email )
Change subject: soc/amd: Remove blank lines before '}' and after '{' ......................................................................
soc/amd: Remove blank lines before '}' and after '{'
Change-Id: I0203e77dd23fa026cd252abbda50f1e9f6892721 Signed-off-by: Elyes Haouas ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/81457 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Eric Lai ericllai@google.com --- M src/soc/amd/common/block/acpi/ivrs.c M src/soc/amd/common/block/lpc/espi_util.c M src/soc/amd/common/fsp/dmi.c M src/soc/amd/common/pi/agesawrapper.c M src/soc/amd/common/pi/heapmanager.c M src/soc/amd/genoa_poc/early_fch.c M src/soc/amd/glinda/psp_verstage/svc.c M src/soc/amd/mendocino/fsp_s_params.c M src/soc/amd/mendocino/psp_verstage/svc.c M src/soc/amd/phoenix/psp_verstage/svc.c M src/soc/amd/picasso/acpi_crat.c 11 files changed, 0 insertions(+), 15 deletions(-)
Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c index 74c5c39..a2f7715 100644 --- a/src/soc/amd/common/block/acpi/ivrs.c +++ b/src/soc/amd/common/block/acpi/ivrs.c @@ -131,7 +131,6 @@ } else if ((header_type == PCI_HEADER_TYPE_NORMAL) && !is_pcie) { /* Device is legacy PCI or PCI-X */ add_ivhd_dev_entry(parent, dev, current, IVHD_DEV_8_BYTE_ALIAS_SELECT, 0x0); - } }
@@ -316,7 +315,6 @@ ivhd = &ivrs->ivhd;
while ((dev = dev_find_path(dev, DEVICE_PATH_DOMAIN)) != NULL) { - nb_dev = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 0)); iommu_dev = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 2)); if (!nb_dev) { diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index c0f2354..f05575a 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -317,7 +317,6 @@ }
return -1; - }
static size_t espi_get_mmio_window_size(int idx) @@ -824,7 +823,6 @@ printk(BIOS_ERR, "Channel is not ready after %d usec (slave addr: 0x%x)\n", ESPI_CH_READY_TIMEOUT_US, slave_reg_addr); return CB_ERR; - }
static void espi_enable_ctrlr_channel(uint32_t channel_en) diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c index d0d9873..d132590 100644 --- a/src/soc/amd/common/fsp/dmi.c +++ b/src/soc/amd/common/fsp/dmi.c @@ -23,7 +23,6 @@ */ static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed) { - if (CONFIG(USE_DDR4) && ddr_type == MEMORY_TYPE_DDR4) return ddr4_speed_mhz_to_reported_mts(speed); else if (CONFIG(USE_LPDDR4) && ddr_type == MEMORY_TYPE_LPDDR4) diff --git a/src/soc/amd/common/pi/agesawrapper.c b/src/soc/amd/common/pi/agesawrapper.c index beae4ba..8ad1e0e 100644 --- a/src/soc/amd/common/pi/agesawrapper.c +++ b/src/soc/amd/common/pi/agesawrapper.c @@ -387,7 +387,6 @@ default: return AGESA_UNSUPPORTED; } - }
AGESA_STATUS agesa_execute_state(AGESA_STRUCT_NAME func) diff --git a/src/soc/amd/common/pi/heapmanager.c b/src/soc/amd/common/pi/heapmanager.c index 154f04d..34a4837 100644 --- a/src/soc/amd/common/pi/heapmanager.c +++ b/src/soc/amd/common/pi/heapmanager.c @@ -236,7 +236,6 @@ * betterfit than the previous nodes */ if (BestFitNodeSize > FreedNodeSize) { - BestFitNodeOffset = FreedNodeOffset; BestFitPrevNodeOffset = @@ -308,7 +307,6 @@ AGESA_STATUS agesa_DeallocateBuffer(uint32_t Func, uintptr_t Data, void *ConfigPtr) { - uint8_t *BiosHeapBaseAddr; uint32_t AllocNodeOffset; uint32_t PrevNodeOffset; @@ -436,5 +434,4 @@ }
return Status; - } diff --git a/src/soc/amd/genoa_poc/early_fch.c b/src/soc/amd/genoa_poc/early_fch.c index e134f49..d82ebcb 100644 --- a/src/soc/amd/genoa_poc/early_fch.c +++ b/src/soc/amd/genoa_poc/early_fch.c @@ -30,5 +30,4 @@ /* After console init */ void fch_early_init(void) { - } diff --git a/src/soc/amd/glinda/psp_verstage/svc.c b/src/soc/amd/glinda/psp_verstage/svc.c index 293bf46..d533d8f 100644 --- a/src/soc/amd/glinda/psp_verstage/svc.c +++ b/src/soc/amd/glinda/psp_verstage/svc.c @@ -183,7 +183,6 @@ }; SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)¶m, retval); return retval; - }
uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) diff --git a/src/soc/amd/mendocino/fsp_s_params.c b/src/soc/amd/mendocino/fsp_s_params.c index e1eff32..8374fb3 100644 --- a/src/soc/amd/mendocino/fsp_s_params.c +++ b/src/soc/amd/mendocino/fsp_s_params.c @@ -19,7 +19,6 @@ scfg->vbios_buffer = 0; printk(BIOS_SPEW, "%s: using VBIOS cache; skipping GOP driver.\n", __func__); return; - } printk(BIOS_SPEW, "%s: not using VBIOS cache; running GOP driver.\n", __func__); scfg->vbios_buffer = CONFIG(RUN_FSP_GOP) ? PCI_VGA_RAM_IMAGE_START : 0; diff --git a/src/soc/amd/mendocino/psp_verstage/svc.c b/src/soc/amd/mendocino/psp_verstage/svc.c index 53d1751..0c6fb5e 100644 --- a/src/soc/amd/mendocino/psp_verstage/svc.c +++ b/src/soc/amd/mendocino/psp_verstage/svc.c @@ -191,7 +191,6 @@ }; SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)¶m, retval); return retval; - }
uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) diff --git a/src/soc/amd/phoenix/psp_verstage/svc.c b/src/soc/amd/phoenix/psp_verstage/svc.c index 45d18c1..6f08678 100644 --- a/src/soc/amd/phoenix/psp_verstage/svc.c +++ b/src/soc/amd/phoenix/psp_verstage/svc.c @@ -181,7 +181,6 @@ }; SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)¶m, retval); return retval; - }
uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) diff --git a/src/soc/amd/picasso/acpi_crat.c b/src/soc/amd/picasso/acpi_crat.c index e528515..bcc3901 100644 --- a/src/soc/amd/picasso/acpi_crat.c +++ b/src/soc/amd/picasso/acpi_crat.c @@ -372,7 +372,6 @@
new_entries = 0; for (thread = 0; thread < total_num_threads; thread++) { - /* L1 data TLB */ if (thread % num_threads_sharing0 == 0) { current = add_crat_tlb_entry(&tlb_affinity, current);
-
Elyes Haouas (Code Review)