EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59290 )
Change subject: mb/google/brya: Move typeC AUX configuration to variant ......................................................................
mb/google/brya: Move typeC AUX configuration to variant
TypeC AUX configuration is variant specific. So move into variant level.
BUG=b:205235144 TEST=No typeC port 0 AUX in felwinter.
Signed-off-by: Eric Lai ericr_lai@compal.corp-partner.google.com Change-Id: I02bfea462cf4c6359fd8d5cca4368786ee03bc8b --- M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/59290/1
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index c89f24f..2204a71 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -1,7 +1,5 @@ chip soc/intel/alderlake
- register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" - # GPE configuration register "pmc_gpe0_dw0" = "GPP_A" register "pmc_gpe0_dw1" = "GPP_E" diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 0052d90..bbba955 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -43,6 +43,8 @@
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
+ register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}" + # FIVR configurations for brya are disabled since the board doesn't have V1p05 and Vnn # bypass rails implemented. register "ext_fivr_settings" = "{
-
EricR Lai (Code Review)