[XS] Change in coreboot[main]: soc/mediatek/mt8196: Increase bootblock size

[Jarried Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu.

Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85043?usp=email )

Change subject: soc/mediatek/mt8196: Increase bootblock size
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soc/mediatek/mt8196: Increase bootblock size

Increase the bootblock size to support TPM.

TEST=Build pass
BUG=b:317009620

Change-Id: I11fb505790a85d967032d48d9aa18e22f525a2e5
Signed-off-by: Jarried Lin 
---
M src/soc/mediatek/mt8196/include/soc/memlayout.ld
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/85043/1

diff --git a/src/soc/mediatek/mt8196/include/soc/memlayout.ld b/src/soc/mediatek/mt8196/include/soc/memlayout.ld
index 9bddf10..f5710f4 100644
--- a/src/soc/mediatek/mt8196/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8196/include/soc/memlayout.ld
@@ -43,7 +43,7 @@
    DRAM_INIT_CODE(0x02000000, 600K)
    #else
    /* The beginning 4K of SRAM_L2C is reserved for BOOTROM until BOOTBLOCK is started. */
-	BOOTBLOCK(0x02001000, 70K)
+	BOOTBLOCK(0x02001000, 75K)
    #endif
    OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x02096000, 272K)
    PRERAM_CBFS_CACHE(0x020DA000, 48K)