Change in coreboot[master]: nb/intel/i945: Set CxDRT1 tRPALL bit if populated with 8-bank

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28648 )

Change subject: nb/intel/i945: Set CxDRT1 tRPALL bit if populated with 8-bank
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Patch Set 14:
> BIOS programs this register with “least common denominator” values after reading the SPD
> registers of each DIMM in the channel."

So looks like it's the least common denominator *per channel*
and not for all DIMMs in the system.

I guess the code is full of such issues anyway (i.e. expects equal
DIMMs in the channels) but we shouldn't make this worse if we can
avoid it.