Chris Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31476
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec
After adjustment on Sarien EVT Touch Screen CLK (Elan): 389.7KHZ Touch Screen CLK (Melfas): 377.7KHZ Touch Pad CLK: 385KHZ
BUG=b:122657195 BRANCH=master TEST=emerge-sarien coreboot chromeos-bootimage measure by scope
Signed-off-by: Chris Zhou chris_zhou@compal.corp-partner.google.com Change-Id: I53b60354e5a7a0ace8efb677775c0a9f8779061d --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/31476/1
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index bcd3c26..df22aff 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -157,12 +157,12 @@ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 190, - .fall_time_ns = 120, + .rise_time_ns = 100, + .fall_time_ns = 80, }, .i2c[1] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 52, + .rise_time_ns = 80, .fall_time_ns = 110, }, .i2c[4] = {
Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31476 )
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31476/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31476/1//COMMIT_MSG@17 PS1, Line 17: measure by scope Need to mention on sarien platform, and please end the sentence with period.
Hello Duncan Laurie, Lijian Zhao, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31476
to look at the new patch set (#2).
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec
After adjustment on Sarien EVT Touch Screen CLK (Elan): 389.7KHZ Touch Screen CLK (Melfas): 377.7KHZ Touch Pad CLK: 385KHZ
BUG=b:122657195 BRANCH=master TEST=emerge-sarien coreboot chromeos-bootimage measure by scope with sarien.
Signed-off-by: Chris Zhou chris_zhou@compal.corp-partner.google.com Change-Id: I53b60354e5a7a0ace8efb677775c0a9f8779061d --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/31476/2
Chris Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31476 )
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31476/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31476/1//COMMIT_MSG@17 PS1, Line 17: measure by scope
Need to mention on sarien platform, and please end the sentence with period.
Done
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31476 )
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG@8 PS2, Line 8: What does the spec require? Below 400 KHz?
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG@10 PS2, Line 10: One space.
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG@10 PS2, Line 10: KHZ KHz
Hello Duncan Laurie, build bot (Jenkins), Lijian Zhao,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31476
to look at the new patch set (#3).
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec
After adjustment on Sarien EVT Touch Screen CLK (Elan): 389.7 KHz Touch Screen CLK (Melfas): 377.7 KHz Touch Pad CLK: 385 KHz
BUG=b:122657195 BRANCH=master TEST=emerge-sarien coreboot chromeos-bootimage measure by scope with sarien.
Signed-off-by: Chris Zhou chris_zhou@compal.corp-partner.google.com Change-Id: I53b60354e5a7a0ace8efb677775c0a9f8779061d --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/31476/3
Chris Zhou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31476 )
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG@8 PS2, Line 8:
What does the spec require? Below 400 KHz?
TP 380 KHz ~ 410 KHz TS below 400 KHz
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG@10 PS2, Line 10:
One space.
Done
https://review.coreboot.org/#/c/31476/2//COMMIT_MSG@10 PS2, Line 10: KHZ
KHz
Done
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31476 )
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
Patch Set 3: Code-Review+2
Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31476 )
Change subject: mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec ......................................................................
mb/google/sarien/variants/sarien: Adjust TP/TS I2C CLK to meet spec
After adjustment on Sarien EVT Touch Screen CLK (Elan): 389.7 KHz Touch Screen CLK (Melfas): 377.7 KHz Touch Pad CLK: 385 KHz
BUG=b:122657195 BRANCH=master TEST=emerge-sarien coreboot chromeos-bootimage measure by scope with sarien.
Signed-off-by: Chris Zhou chris_zhou@compal.corp-partner.google.com Change-Id: I53b60354e5a7a0ace8efb677775c0a9f8779061d Reviewed-on: https://review.coreboot.org/c/31476 Reviewed-by: Duncan Laurie dlaurie@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb 1 file changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index bcd3c26..df22aff 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -157,12 +157,12 @@ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 190, - .fall_time_ns = 120, + .rise_time_ns = 100, + .fall_time_ns = 80, }, .i2c[1] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 52, + .rise_time_ns = 80, .fall_time_ns = 110, }, .i2c[4] = {