Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32233
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
chromeos: clean up "recovery" and "write protect" GPIOs
The "write protect" GPIO's cached value is never actually read after entering depthcharge. Ensure the value from get_write_protect_state() is being transferred accurately, so that we may read this GPIO value in depthcharge without resampling.
The cached value of the "recovery" GPIO is read only on certain boards which have a physical recovery switch. Correct some of the values sent to boards which presumably never read the previously incorrect value. Most of these inaccuracies are from non-inverted values on ACTIVE_LOW GPIOs.
BUG=b:124141368, b:124192753, chromium:950273 TEST=make clean && make test-abuild BRANCH=none
Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51 Signed-off-by: Joel Kitching kitching@google.com --- M src/mainboard/google/auron/chromeos.c M src/mainboard/google/beltino/chromeos.c M src/mainboard/google/cheza/chromeos.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gale/chromeos.c M src/mainboard/google/gru/chromeos.c M src/mainboard/google/jecht/chromeos.c M src/mainboard/google/nyan/chromeos.c M src/mainboard/google/nyan_big/chromeos.c M src/mainboard/google/nyan_blaze/chromeos.c M src/mainboard/google/oak/chromeos.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/sarien/chromeos.c M src/mainboard/google/slippy/chromeos.c M src/mainboard/google/smaug/chromeos.c M src/mainboard/google/storm/chromeos.c M src/mainboard/google/veyron/chromeos.c M src/mainboard/google/veyron_mickey/chromeos.c M src/mainboard/google/veyron_rialto/chromeos.c M src/mainboard/intel/baskingridge/chromeos.c M src/mainboard/intel/emeraldlake2/chromeos.c M src/mainboard/intel/wtm2/chromeos.c 23 files changed, 51 insertions(+), 49 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/32233/1
diff --git a/src/mainboard/google/auron/chromeos.c b/src/mainboard/google/auron/chromeos.c index c27ad9e..942e9dd 100644 --- a/src/mainboard/google/auron/chromeos.c +++ b/src/mainboard/google/auron/chromeos.c @@ -25,7 +25,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {CROS_WP_GPIO, ACTIVE_HIGH, 0, "write protect"}, + {CROS_WP_GPIO, ACTIVE_HIGH, get_write_protect_state(), + "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index 1a1d0a2..92bb7b4 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -33,9 +33,10 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_SPI_WP, ACTIVE_HIGH, 0, "write protect"}, + {GPIO_SPI_WP, ACTIVE_HIGH, + get_write_protect_state(), "write protect"}, {GPIO_REC_MODE, ACTIVE_LOW, - get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/cheza/chromeos.c b/src/mainboard/google/cheza/chromeos.c index 1c2c4f5..e840613 100644 --- a/src/mainboard/google/cheza/chromeos.c +++ b/src/mainboard/google/cheza/chromeos.c @@ -38,7 +38,7 @@ "EC in RW"}, {GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT), "EC interrupt"}, - {GPIO_WP_STATE.addr, ACTIVE_LOW, gpio_get(GPIO_WP_STATE), + {GPIO_WP_STATE.addr, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT), "TPM interrupt"}, diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c index 65139bb..c06f839 100644 --- a/src/mainboard/google/daisy/chromeos.c +++ b/src/mainboard/google/daisy/chromeos.c @@ -27,7 +27,7 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: active low (WP_GPIO) */ - {EXYNOS5_GPD1, ACTIVE_LOW, gpio_get_value(GPIO_D16), + {EXYNOS5_GPD1, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: active low */ diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c index 024fd4c..026dd3e 100644 --- a/src/mainboard/google/foster/chromeos.c +++ b/src/mainboard/google/foster/chromeos.c @@ -27,7 +27,7 @@ /* TBD(twarren@nvidia.com): Any analogs for these on Foster-FFD? */ struct lb_gpio chromeos_gpios[] = { /* Write Protect: active low */ - {-1, ACTIVE_LOW, get_write_protect_state(), "write protect"}, + {-1, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: active high */ {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, diff --git a/src/mainboard/google/gale/chromeos.c b/src/mainboard/google/gale/chromeos.c index 66b1a62..69c3a7a 100644 --- a/src/mainboard/google/gale/chromeos.c +++ b/src/mainboard/google/gale/chromeos.c @@ -25,9 +25,6 @@ #include <vendorcode/google/chromeos/chromeos.h>
#define PP_SW 41 -#define PP_POL ACTIVE_LOW -#define REC_POL ACTIVE_LOW -#define WP_POL ACTIVE_LOW
static int get_rec_sw_gpio_pin(void) { @@ -70,11 +67,11 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {PP_SW, PP_POL, read_gpio(PP_SW), "presence"}, - {get_rec_sw_gpio_pin(), REC_POL, + {PP_SW, ACTIVE_LOW, read_gpio(PP_SW), "presence"}, + {get_rec_sw_gpio_pin(), ACTIVE_LOW, read_gpio(get_rec_sw_gpio_pin()), "recovery"}, - {get_wp_status_gpio_pin(), WP_POL, - read_gpio(get_wp_status_gpio_pin()), "write protect"}, + {get_wp_status_gpio_pin(), ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, {-1, ACTIVE_LOW, 0, "lid"}, }; @@ -119,7 +116,7 @@ return saved_state;
rec_sw = get_rec_sw_gpio_pin(); - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw);
if (!sampled_value) { saved_state = no_req; @@ -133,7 +130,7 @@ stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS);
do { - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -143,7 +140,7 @@ printk(BIOS_INFO, "wipeout requested, checking recovery\n"); stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS); do { - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -175,5 +172,5 @@
int get_write_protect_state(void) { - return read_gpio(get_wp_status_gpio_pin()) ^ !WP_POL; + return !read_gpio(get_wp_status_gpio_pin()); } diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c index a856e45..53d00fb 100644 --- a/src/mainboard/google/gru/chromeos.c +++ b/src/mainboard/google/gru/chromeos.c @@ -26,15 +26,14 @@
int get_write_protect_state(void) { - int raw = gpio_get(GPIO_WP); - return wp_polarity == ACTIVE_HIGH ? raw : !raw; + return gpio_get(GPIO_WP) ^ !wp_polarity; }
void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, wp_polarity, gpio_get(GPIO_WP), - "write protect"}, + {GPIO_WP.raw, wp_polarity, + get_write_protect_state() ^ !wp_polarity, "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, #if CONFIG(GRU_BASEBOARD_SCARLET) {GPIO_BACKLIGHT.raw, ACTIVE_HIGH, -1, "backlight"}, diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index c0b14f3..b3215a0 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -35,9 +35,9 @@ { struct lb_gpio chromeos_gpios[] = { {GPIO_SPI_WP, ACTIVE_HIGH, - get_gpio(GPIO_SPI_WP), "write protect"}, + get_write_protect_state(), "write protect"}, {GPIO_REC_MODE, ACTIVE_LOW, - get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/nyan/chromeos.c b/src/mainboard/google/nyan/chromeos.c index be1b98d..ba851c7 100644 --- a/src/mainboard/google/nyan/chromeos.c +++ b/src/mainboard/google/nyan/chromeos.c @@ -20,7 +20,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO(R1), ACTIVE_LOW, gpio_get(GPIO(R1)), "write protect"}, + {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/nyan_big/chromeos.c b/src/mainboard/google/nyan_big/chromeos.c index 945a0e7..f297998 100644 --- a/src/mainboard/google/nyan_big/chromeos.c +++ b/src/mainboard/google/nyan_big/chromeos.c @@ -20,7 +20,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO(R1), ACTIVE_LOW, gpio_get(GPIO(R1)), "write protect"}, + {GPIO(R1), ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/nyan_blaze/chromeos.c b/src/mainboard/google/nyan_blaze/chromeos.c index 945a0e7..dbbd91f 100644 --- a/src/mainboard/google/nyan_blaze/chromeos.c +++ b/src/mainboard/google/nyan_blaze/chromeos.c @@ -20,7 +20,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO(R1), ACTIVE_LOW, gpio_get(GPIO(R1)), "write protect"}, + {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/oak/chromeos.c b/src/mainboard/google/oak/chromeos.c index b5d7023..4e07236 100644 --- a/src/mainboard/google/oak/chromeos.c +++ b/src/mainboard/google/oak/chromeos.c @@ -35,7 +35,7 @@ { struct lb_gpio chromeos_gpios[] = { {WRITE_PROTECT.id, ACTIVE_LOW, - gpio_get(WRITE_PROTECT), "write protect"}, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {LID.id, ACTIVE_HIGH, -1, "lid"}, {POWER_BUTTON.id, ACTIVE_HIGH, -1, "power"}, diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c index f507bd8..00dd1f3 100644 --- a/src/mainboard/google/peach_pit/chromeos.c +++ b/src/mainboard/google/peach_pit/chromeos.c @@ -27,7 +27,7 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: active low (WP_GPIO) */ - {EXYNOS5_GPX3, ACTIVE_LOW, gpio_get_value(GPIO_X30), + {EXYNOS5_GPX3, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: active low */ diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c index 2bef829..15670d0 100644 --- a/src/mainboard/google/sarien/chromeos.c +++ b/src/mainboard/google/sarien/chromeos.c @@ -36,7 +36,7 @@ struct lb_gpio chromeos_gpios[] = { {GPIO_PCH_WP, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {GPIO_REC_MODE, ACTIVE_LOW, get_recovery_mode_switch(), + {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index 6cae38d..15779ee 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -24,7 +24,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {58, ACTIVE_HIGH, 0, "write protect"}, + {58, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/smaug/chromeos.c b/src/mainboard/google/smaug/chromeos.c index 86e8cb2..567a3ae 100644 --- a/src/mainboard/google/smaug/chromeos.c +++ b/src/mainboard/google/smaug/chromeos.c @@ -22,7 +22,7 @@ { struct lb_gpio chromeos_gpios[] = { {WRITE_PROTECT_L, ACTIVE_LOW, - gpio_get(WRITE_PROTECT_L), "write protect"}, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {POWER_BUTTON, ACTIVE_LOW, -1, "power"}, {EC_IN_RW, ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/storm/chromeos.c b/src/mainboard/google/storm/chromeos.c index b829457..ccc0b53 100644 --- a/src/mainboard/google/storm/chromeos.c +++ b/src/mainboard/google/storm/chromeos.c @@ -25,11 +25,8 @@ #include <vendorcode/google/chromeos/chromeos.h>
#define DEV_SW 15 -#define DEV_POL ACTIVE_LOW #define REC_SW 16 -#define REC_POL ACTIVE_LOW #define WP_SW 17 -#define WP_POL ACTIVE_LOW
static int read_gpio(gpio_t gpio_num) { @@ -43,7 +40,8 @@ { struct lb_gpio chromeos_gpios[] = { {REC_SW, ACTIVE_LOW, read_gpio(REC_SW), "recovery"}, - {WP_SW, ACTIVE_LOW, read_gpio(WP_SW), "write protect"}, + {WP_SW, ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, {-1, ACTIVE_LOW, 0, "lid"}, }; @@ -87,7 +85,7 @@ if (saved_state != not_probed) return saved_state;
- sampled_value = read_gpio(REC_SW) ^ !REC_POL; + sampled_value = !read_gpio(REC_SW);
if (!sampled_value) { saved_state = no_req; @@ -101,7 +99,7 @@ stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS);
do { - sampled_value = read_gpio(REC_SW) ^ !REC_POL; + sampled_value = !read_gpio(REC_SW); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -111,7 +109,7 @@ printk(BIOS_INFO, "wipeout requested, checking recovery\n"); stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS); do { - sampled_value = read_gpio(REC_SW) ^ !REC_POL; + sampled_value = !read_gpio(REC_SW); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -143,5 +141,5 @@
int get_write_protect_state(void) { - return read_gpio(WP_SW) ^ !WP_POL; + return !read_gpio(WP_SW); } diff --git a/src/mainboard/google/veyron/chromeos.c b/src/mainboard/google/veyron/chromeos.c index ac14e37..357a7fc 100644 --- a/src/mainboard/google/veyron/chromeos.c +++ b/src/mainboard/google/veyron/chromeos.c @@ -40,9 +40,10 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, ACTIVE_LOW, gpio_get(GPIO_WP), "write protect"}, + {GPIO_WP.raw, ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {GPIO_RECOVERY.raw, ACTIVE_LOW, - get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {GPIO_LID.raw, ACTIVE_HIGH, -1, "lid"}, {GPIO_POWER.raw, ACTIVE_LOW, -1, "power"}, {GPIO_ECINRW.raw, ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/veyron_mickey/chromeos.c b/src/mainboard/google/veyron_mickey/chromeos.c index c775e48..46a6738 100644 --- a/src/mainboard/google/veyron_mickey/chromeos.c +++ b/src/mainboard/google/veyron_mickey/chromeos.c @@ -31,9 +31,10 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, ACTIVE_LOW, gpio_get(GPIO_WP), "write protect"}, + {GPIO_WP.raw, ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {GPIO_RECOVERY.raw, ACTIVE_LOW, - gpio_get(GPIO_RECOVERY), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); diff --git a/src/mainboard/google/veyron_rialto/chromeos.c b/src/mainboard/google/veyron_rialto/chromeos.c index a0ac77e..e86d863 100644 --- a/src/mainboard/google/veyron_rialto/chromeos.c +++ b/src/mainboard/google/veyron_rialto/chromeos.c @@ -36,7 +36,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, ACTIVE_LOW, gpio_get(GPIO_WP), "write protect"}, + {GPIO_WP.raw, ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, /* Note for early development, we want to support both servo * and pushkey recovery buttons in firmware boot stages. */ {GPIO_RECOVERY_PUSHKEY.raw, ACTIVE_LOW, diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 0c8d0b2..f1fd3ed 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -30,7 +30,7 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: GPIO22 */ - {0, ACTIVE_LOW, get_write_protect_state(), "write protect"}, + {0, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */ {69, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index aa0d9aa..78610d3 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -30,10 +30,10 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: GPIO48 */ - {48, ACTIVE_LOW, get_write_protect_state(), "write protect"}, + {48, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: GPIO22 */ - {22, ACTIVE_LOW, get_recovery_mode_switch(), "recovery"}, + {22, ACTIVE_LOW, !get_recovery_mode_switch(), "recovery"},
/* Hard code the lid switch GPIO to open. */ {-1, ACTIVE_HIGH, 1, "lid"}, diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index 6464ef4..0f5cfbb 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -28,8 +28,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {-1, ACTIVE_HIGH, 0, "write protect"}, - {-1, ACTIVE_HIGH, REC_MODE_SETTING, "recovery"}, + {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, + {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, // force open {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@18 PS1, Line 18: Most of these inaccuracies are from : non-inverted values on ACTIVE_LOW GPIOs. For the GPIOs that had the incorrect values because of ACTIVE_LOW nature of GPIOs, can the entry be in lb_gpio table be set to { -1, ACTIVE_HIGH, get_write_protect_state, "write protect" }, or { -1, ACTIVE_HIGH, get_recovery_mode_switch, "recovery" },
This ensures that: 1. -1 --> No resampling in coreboot 2. ACTIVE_HIGH --> No need to remember to invert the values which are already returning the value of the switch correctly by taking the polarity into account.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1: Code-Review+2
(3 comments)
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@15 PS1, Line 15: The cached value of the "recovery" GPIO is read only on certain : boards which have a physical recovery switch. It actually isn't at all right now, because the "recovery" GPIO isn't installed with resample_at_runtime set. It should be, though, so we can change it to that after this. For that to work it must always have an actual GPIO number defined in the table, though, so I'd suggest to just take out all the "recovery" GPIOs that don't in this patch.
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@18 PS1, Line 18: Most of these inaccuracies are from : non-inverted values on ACTIVE_LOW GPIOs.
For the GPIOs that had the incorrect values because of ACTIVE_LOW nature of GPIOs, can the entry be […]
We should take the "recovery" out completely if it doesn't need to be resampled (see above). For write-protect, we could do it as you says. But another option would be to also read the write-protect GPIO in depthcharge, and then we wouldn't need the "value read by coreboot" field at all anymore (and the resample_at_runtime flag in depthcharge can go away because it's true for all GPIOs).
https://review.coreboot.org/#/c/32233/1/src/mainboard/google/gru/chromeos.c File src/mainboard/google/gru/chromeos.c:
https://review.coreboot.org/#/c/32233/1/src/mainboard/google/gru/chromeos.c@... PS1, Line 36: get_write_protect_state() ^ !wp_polarity, "write protect"}, I think in this case, leaving it as gpio_get() would be cleaner?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@15 PS1, Line 15: The cached value of the "recovery" GPIO is read only on certain : boards which have a physical recovery switch.
It actually isn't at all right now, because the "recovery" GPIO isn't installed with resample_at_run […]
Boards might have different ways of reporting recovery switches. The latest example is sarien where it has a GPIO but also other ways for identifying recovery mode request. So, we need to be careful about that.
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@18 PS1, Line 18: Most of these inaccuracies are from : non-inverted values on ACTIVE_LOW GPIOs.
We should take the "recovery" out completely if it doesn't need to be resampled (see above). […]
+1 to what you said about letting depthcharge read the GPIO state for write-protect.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@15 PS1, Line 15: The cached value of the "recovery" GPIO is read only on certain : boards which have a physical recovery switch.
Boards might have different ways of reporting recovery switches. […]
Right, but those can't be handled in this table anyway. They can continue to do flag_replace() in depthcharge to install a custom driver.
Joel Kitching has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1:
(3 comments)
Feel free to keep the discussion going to decide what to do with the lb_gpio table in the long run. If everyone is okay with my comments, can we commit this?
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@15 PS1, Line 15: The cached value of the "recovery" GPIO is read only on certain : boards which have a physical recovery switch.
Right, but those can't be handled in this table anyway. […]
Re. "recovery" isn't read at all: Unless I'm mistaken, it is read on a few boards, by calling flag_replace with the same "recovery" GPIO and resample_at_runtime=1. For example:
flag_replace(FLAG_RECSW, sysinfo_lookup_gpio("recovery", 1, new_rk_gpio_input_from_coreboot));
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@18 PS1, Line 18: Most of these inaccuracies are from : non-inverted values on ACTIVE_LOW GPIOs.
+1 to what you said about letting depthcharge read the GPIO state for write-protect.
Re. removing "recovery": see my comment response above.
Re. using ACTIVE_HIGH for inverting initial values: This almost underlines the fact that we are doing something really strange here -- using a GPIO table to transfer a value from one firmware application to another. I would prefer to keep it as the "true polarity" right now, and decide whether we would like to go the direction that Julius mentioned (all GPIOs are sampled in depthcharge), or choose some other vehicle for transferring these values (no one says they need to be transferred in lb_gpio table in the first place).
Re. read write-protect GPIO in depthcharge: Yeah, this might be a good idea. However I think that would be best to put in a subsequent CL. I'd like to first correct all of the discrepancies between "initial value" and get_write_protect_state/get_recovery_mode_switch.
As I mentioned in the offline email, it's also very hard to understand which GPIO needs an initial value and which doesn't; which GPIO is read in depthcharge onward and which isn't. We may even think about a bigger refactor here to smooth out these bumps.
https://review.coreboot.org/#/c/32233/1/src/mainboard/google/gru/chromeos.c File src/mainboard/google/gru/chromeos.c:
https://review.coreboot.org/#/c/32233/1/src/mainboard/google/gru/chromeos.c@... PS1, Line 36: get_write_protect_state() ^ !wp_polarity, "write protect"},
I think in this case, leaving it as gpio_get() would be cleaner?
I agree it's a bit confusing, but I think it's really important to get all of the WP initial value in a consistent state, reading from get_write_protect_state, before we make our next move here.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@15 PS1, Line 15: The cached value of the "recovery" GPIO is read only on certain : boards which have a physical recovery switch.
Re. "recovery" isn't read at all: […]
Oh okay... yes, when boards call it in flag_replace() explicitly like that, it is read.
https://review.coreboot.org/#/c/32233/1//COMMIT_MSG@18 PS1, Line 18: Most of these inaccuracies are from : non-inverted values on ACTIVE_LOW GPIOs.
Re. removing "recovery": see my comment response above.
I think we should replace all instances of "recovery" that are actually used for something with "presence", and then change the vboot/depthcharge code to use that flag for the developer mode confirmation instead (I think I mentioned this on a vboot CL somewhere too). Then we can get rid of "recovery". (This should make it easier to expand the system onto boards that use a different GPIO for that confirmation, like the power button on Sarien.)
This almost underlines the fact that we are doing something really strange here -- using a GPIO table to transfer a value from one firmware application to another.
I agree... using a GPIO table to transfer a value from something that isn't actually a GPIO anymore is weird. Would be good to get rid of that case, only use the table for actual GPIOs, sample them all in depthcharge when they're needed and maybe remove the "value" field from lb_gpio (although maybe that last one isn't really worth it).
However I think that would be best to put in a subsequent CL.
Sure, it's fine doing it in more steps, as long as we agree on where we want to end up.
As I mentioned in the offline email, it's also very hard to understand which GPIO needs an initial value and which doesn't; which GPIO is read in depthcharge onward and which isn't.
Another good reason to eliminate one of those two cases entirely.
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32233 )
Change subject: chromeos: clean up "recovery" and "write protect" GPIOs ......................................................................
chromeos: clean up "recovery" and "write protect" GPIOs
The "write protect" GPIO's cached value is never actually read after entering depthcharge. Ensure the value from get_write_protect_state() is being transferred accurately, so that we may read this GPIO value in depthcharge without resampling.
The cached value of the "recovery" GPIO is read only on certain boards which have a physical recovery switch. Correct some of the values sent to boards which presumably never read the previously incorrect value. Most of these inaccuracies are from non-inverted values on ACTIVE_LOW GPIOs.
BUG=b:124141368, b:124192753, chromium:950273 TEST=make clean && make test-abuild BRANCH=none
Change-Id: Ic17a98768703d7098480a9233b752fe5b201bd51 Signed-off-by: Joel Kitching kitching@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32233 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org --- M src/mainboard/google/auron/chromeos.c M src/mainboard/google/beltino/chromeos.c M src/mainboard/google/cheza/chromeos.c M src/mainboard/google/daisy/chromeos.c M src/mainboard/google/foster/chromeos.c M src/mainboard/google/gale/chromeos.c M src/mainboard/google/gru/chromeos.c M src/mainboard/google/jecht/chromeos.c M src/mainboard/google/nyan/chromeos.c M src/mainboard/google/nyan_big/chromeos.c M src/mainboard/google/nyan_blaze/chromeos.c M src/mainboard/google/oak/chromeos.c M src/mainboard/google/peach_pit/chromeos.c M src/mainboard/google/sarien/chromeos.c M src/mainboard/google/slippy/chromeos.c M src/mainboard/google/smaug/chromeos.c M src/mainboard/google/storm/chromeos.c M src/mainboard/google/veyron/chromeos.c M src/mainboard/google/veyron_mickey/chromeos.c M src/mainboard/google/veyron_rialto/chromeos.c M src/mainboard/intel/baskingridge/chromeos.c M src/mainboard/intel/emeraldlake2/chromeos.c M src/mainboard/intel/wtm2/chromeos.c 23 files changed, 51 insertions(+), 49 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved
diff --git a/src/mainboard/google/auron/chromeos.c b/src/mainboard/google/auron/chromeos.c index c27ad9e..942e9dd 100644 --- a/src/mainboard/google/auron/chromeos.c +++ b/src/mainboard/google/auron/chromeos.c @@ -25,7 +25,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {CROS_WP_GPIO, ACTIVE_HIGH, 0, "write protect"}, + {CROS_WP_GPIO, ACTIVE_HIGH, get_write_protect_state(), + "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c index 1a1d0a2..92bb7b4 100644 --- a/src/mainboard/google/beltino/chromeos.c +++ b/src/mainboard/google/beltino/chromeos.c @@ -33,9 +33,10 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_SPI_WP, ACTIVE_HIGH, 0, "write protect"}, + {GPIO_SPI_WP, ACTIVE_HIGH, + get_write_protect_state(), "write protect"}, {GPIO_REC_MODE, ACTIVE_LOW, - get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/cheza/chromeos.c b/src/mainboard/google/cheza/chromeos.c index 1c2c4f5..e840613 100644 --- a/src/mainboard/google/cheza/chromeos.c +++ b/src/mainboard/google/cheza/chromeos.c @@ -38,7 +38,7 @@ "EC in RW"}, {GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT), "EC interrupt"}, - {GPIO_WP_STATE.addr, ACTIVE_LOW, gpio_get(GPIO_WP_STATE), + {GPIO_WP_STATE.addr, ACTIVE_LOW, !get_write_protect_state(), "write protect"}, {GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT), "TPM interrupt"}, diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c index 65139bb..c06f839 100644 --- a/src/mainboard/google/daisy/chromeos.c +++ b/src/mainboard/google/daisy/chromeos.c @@ -27,7 +27,7 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: active low (WP_GPIO) */ - {EXYNOS5_GPD1, ACTIVE_LOW, gpio_get_value(GPIO_D16), + {EXYNOS5_GPD1, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: active low */ diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c index 024fd4c..026dd3e 100644 --- a/src/mainboard/google/foster/chromeos.c +++ b/src/mainboard/google/foster/chromeos.c @@ -27,7 +27,7 @@ /* TBD(twarren@nvidia.com): Any analogs for these on Foster-FFD? */ struct lb_gpio chromeos_gpios[] = { /* Write Protect: active low */ - {-1, ACTIVE_LOW, get_write_protect_state(), "write protect"}, + {-1, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: active high */ {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, diff --git a/src/mainboard/google/gale/chromeos.c b/src/mainboard/google/gale/chromeos.c index 66b1a62..69c3a7a 100644 --- a/src/mainboard/google/gale/chromeos.c +++ b/src/mainboard/google/gale/chromeos.c @@ -25,9 +25,6 @@ #include <vendorcode/google/chromeos/chromeos.h>
#define PP_SW 41 -#define PP_POL ACTIVE_LOW -#define REC_POL ACTIVE_LOW -#define WP_POL ACTIVE_LOW
static int get_rec_sw_gpio_pin(void) { @@ -70,11 +67,11 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {PP_SW, PP_POL, read_gpio(PP_SW), "presence"}, - {get_rec_sw_gpio_pin(), REC_POL, + {PP_SW, ACTIVE_LOW, read_gpio(PP_SW), "presence"}, + {get_rec_sw_gpio_pin(), ACTIVE_LOW, read_gpio(get_rec_sw_gpio_pin()), "recovery"}, - {get_wp_status_gpio_pin(), WP_POL, - read_gpio(get_wp_status_gpio_pin()), "write protect"}, + {get_wp_status_gpio_pin(), ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, {-1, ACTIVE_LOW, 0, "lid"}, }; @@ -119,7 +116,7 @@ return saved_state;
rec_sw = get_rec_sw_gpio_pin(); - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw);
if (!sampled_value) { saved_state = no_req; @@ -133,7 +130,7 @@ stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS);
do { - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -143,7 +140,7 @@ printk(BIOS_INFO, "wipeout requested, checking recovery\n"); stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS); do { - sampled_value = read_gpio(rec_sw) ^ !REC_POL; + sampled_value = !read_gpio(rec_sw); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -175,5 +172,5 @@
int get_write_protect_state(void) { - return read_gpio(get_wp_status_gpio_pin()) ^ !WP_POL; + return !read_gpio(get_wp_status_gpio_pin()); } diff --git a/src/mainboard/google/gru/chromeos.c b/src/mainboard/google/gru/chromeos.c index a856e45..53d00fb 100644 --- a/src/mainboard/google/gru/chromeos.c +++ b/src/mainboard/google/gru/chromeos.c @@ -26,15 +26,14 @@
int get_write_protect_state(void) { - int raw = gpio_get(GPIO_WP); - return wp_polarity == ACTIVE_HIGH ? raw : !raw; + return gpio_get(GPIO_WP) ^ !wp_polarity; }
void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, wp_polarity, gpio_get(GPIO_WP), - "write protect"}, + {GPIO_WP.raw, wp_polarity, + get_write_protect_state() ^ !wp_polarity, "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, #if CONFIG(GRU_BASEBOARD_SCARLET) {GPIO_BACKLIGHT.raw, ACTIVE_HIGH, -1, "backlight"}, diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c index c0b14f3..b3215a0 100644 --- a/src/mainboard/google/jecht/chromeos.c +++ b/src/mainboard/google/jecht/chromeos.c @@ -35,9 +35,9 @@ { struct lb_gpio chromeos_gpios[] = { {GPIO_SPI_WP, ACTIVE_HIGH, - get_gpio(GPIO_SPI_WP), "write protect"}, + get_write_protect_state(), "write protect"}, {GPIO_REC_MODE, ACTIVE_LOW, - get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, diff --git a/src/mainboard/google/nyan/chromeos.c b/src/mainboard/google/nyan/chromeos.c index be1b98d..ba851c7 100644 --- a/src/mainboard/google/nyan/chromeos.c +++ b/src/mainboard/google/nyan/chromeos.c @@ -20,7 +20,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO(R1), ACTIVE_LOW, gpio_get(GPIO(R1)), "write protect"}, + {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/nyan_big/chromeos.c b/src/mainboard/google/nyan_big/chromeos.c index 945a0e7..f297998 100644 --- a/src/mainboard/google/nyan_big/chromeos.c +++ b/src/mainboard/google/nyan_big/chromeos.c @@ -20,7 +20,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO(R1), ACTIVE_LOW, gpio_get(GPIO(R1)), "write protect"}, + {GPIO(R1), ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/nyan_blaze/chromeos.c b/src/mainboard/google/nyan_blaze/chromeos.c index 945a0e7..dbbd91f 100644 --- a/src/mainboard/google/nyan_blaze/chromeos.c +++ b/src/mainboard/google/nyan_blaze/chromeos.c @@ -20,7 +20,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO(R1), ACTIVE_LOW, gpio_get(GPIO(R1)), "write protect"}, + {GPIO(R1), ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {GPIO(R4), ACTIVE_HIGH, -1, "lid"}, {GPIO(Q0), ACTIVE_LOW, -1, "power"}, diff --git a/src/mainboard/google/oak/chromeos.c b/src/mainboard/google/oak/chromeos.c index b5d7023..4e07236 100644 --- a/src/mainboard/google/oak/chromeos.c +++ b/src/mainboard/google/oak/chromeos.c @@ -35,7 +35,7 @@ { struct lb_gpio chromeos_gpios[] = { {WRITE_PROTECT.id, ACTIVE_LOW, - gpio_get(WRITE_PROTECT), "write protect"}, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {LID.id, ACTIVE_HIGH, -1, "lid"}, {POWER_BUTTON.id, ACTIVE_HIGH, -1, "power"}, diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c index f507bd8..00dd1f3 100644 --- a/src/mainboard/google/peach_pit/chromeos.c +++ b/src/mainboard/google/peach_pit/chromeos.c @@ -27,7 +27,7 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: active low (WP_GPIO) */ - {EXYNOS5_GPX3, ACTIVE_LOW, gpio_get_value(GPIO_X30), + {EXYNOS5_GPX3, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: active low */ diff --git a/src/mainboard/google/sarien/chromeos.c b/src/mainboard/google/sarien/chromeos.c index 2bef829..15670d0 100644 --- a/src/mainboard/google/sarien/chromeos.c +++ b/src/mainboard/google/sarien/chromeos.c @@ -36,7 +36,7 @@ struct lb_gpio chromeos_gpios[] = { {GPIO_PCH_WP, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, - {GPIO_REC_MODE, ACTIVE_LOW, get_recovery_mode_switch(), + {GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index 6cae38d..15779ee 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -24,7 +24,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {58, ACTIVE_HIGH, 0, "write protect"}, + {58, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, 0, "power"}, diff --git a/src/mainboard/google/smaug/chromeos.c b/src/mainboard/google/smaug/chromeos.c index 86e8cb2..567a3ae 100644 --- a/src/mainboard/google/smaug/chromeos.c +++ b/src/mainboard/google/smaug/chromeos.c @@ -22,7 +22,7 @@ { struct lb_gpio chromeos_gpios[] = { {WRITE_PROTECT_L, ACTIVE_LOW, - gpio_get(WRITE_PROTECT_L), "write protect"}, + !get_write_protect_state(), "write protect"}, {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {POWER_BUTTON, ACTIVE_LOW, -1, "power"}, {EC_IN_RW, ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/storm/chromeos.c b/src/mainboard/google/storm/chromeos.c index b829457..ccc0b53 100644 --- a/src/mainboard/google/storm/chromeos.c +++ b/src/mainboard/google/storm/chromeos.c @@ -25,11 +25,8 @@ #include <vendorcode/google/chromeos/chromeos.h>
#define DEV_SW 15 -#define DEV_POL ACTIVE_LOW #define REC_SW 16 -#define REC_POL ACTIVE_LOW #define WP_SW 17 -#define WP_POL ACTIVE_LOW
static int read_gpio(gpio_t gpio_num) { @@ -43,7 +40,8 @@ { struct lb_gpio chromeos_gpios[] = { {REC_SW, ACTIVE_LOW, read_gpio(REC_SW), "recovery"}, - {WP_SW, ACTIVE_LOW, read_gpio(WP_SW), "write protect"}, + {WP_SW, ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {-1, ACTIVE_LOW, 1, "power"}, {-1, ACTIVE_LOW, 0, "lid"}, }; @@ -87,7 +85,7 @@ if (saved_state != not_probed) return saved_state;
- sampled_value = read_gpio(REC_SW) ^ !REC_POL; + sampled_value = !read_gpio(REC_SW);
if (!sampled_value) { saved_state = no_req; @@ -101,7 +99,7 @@ stopwatch_init_msecs_expire(&sw, WIPEOUT_MODE_DELAY_MS);
do { - sampled_value = read_gpio(REC_SW) ^ !REC_POL; + sampled_value = !read_gpio(REC_SW); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -111,7 +109,7 @@ printk(BIOS_INFO, "wipeout requested, checking recovery\n"); stopwatch_init_msecs_expire(&sw, RECOVERY_MODE_EXTRA_DELAY_MS); do { - sampled_value = read_gpio(REC_SW) ^ !REC_POL; + sampled_value = !read_gpio(REC_SW); if (!sampled_value) break; } while (!stopwatch_expired(&sw)); @@ -143,5 +141,5 @@
int get_write_protect_state(void) { - return read_gpio(WP_SW) ^ !WP_POL; + return !read_gpio(WP_SW); } diff --git a/src/mainboard/google/veyron/chromeos.c b/src/mainboard/google/veyron/chromeos.c index ac14e37..357a7fc 100644 --- a/src/mainboard/google/veyron/chromeos.c +++ b/src/mainboard/google/veyron/chromeos.c @@ -40,9 +40,10 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, ACTIVE_LOW, gpio_get(GPIO_WP), "write protect"}, + {GPIO_WP.raw, ACTIVE_LOW, !get_write_protect_state(), + "write protect"}, {GPIO_RECOVERY.raw, ACTIVE_LOW, - get_recovery_mode_switch(), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {GPIO_LID.raw, ACTIVE_HIGH, -1, "lid"}, {GPIO_POWER.raw, ACTIVE_LOW, -1, "power"}, {GPIO_ECINRW.raw, ACTIVE_HIGH, -1, "EC in RW"}, diff --git a/src/mainboard/google/veyron_mickey/chromeos.c b/src/mainboard/google/veyron_mickey/chromeos.c index c775e48..46a6738 100644 --- a/src/mainboard/google/veyron_mickey/chromeos.c +++ b/src/mainboard/google/veyron_mickey/chromeos.c @@ -31,9 +31,10 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, ACTIVE_LOW, gpio_get(GPIO_WP), "write protect"}, + {GPIO_WP.raw, ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, {GPIO_RECOVERY.raw, ACTIVE_LOW, - gpio_get(GPIO_RECOVERY), "recovery"}, + !get_recovery_mode_switch(), "recovery"}, {GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); diff --git a/src/mainboard/google/veyron_rialto/chromeos.c b/src/mainboard/google/veyron_rialto/chromeos.c index a0ac77e..e86d863 100644 --- a/src/mainboard/google/veyron_rialto/chromeos.c +++ b/src/mainboard/google/veyron_rialto/chromeos.c @@ -36,7 +36,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {GPIO_WP.raw, ACTIVE_LOW, gpio_get(GPIO_WP), "write protect"}, + {GPIO_WP.raw, ACTIVE_LOW, + !get_write_protect_state(), "write protect"}, /* Note for early development, we want to support both servo * and pushkey recovery buttons in firmware boot stages. */ {GPIO_RECOVERY_PUSHKEY.raw, ACTIVE_LOW, diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c index 0c8d0b2..f1fd3ed 100644 --- a/src/mainboard/intel/baskingridge/chromeos.c +++ b/src/mainboard/intel/baskingridge/chromeos.c @@ -30,7 +30,7 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: GPIO22 */ - {0, ACTIVE_LOW, get_write_protect_state(), "write protect"}, + {0, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */ {69, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index aa0d9aa..78610d3 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -30,10 +30,10 @@ { struct lb_gpio chromeos_gpios[] = { /* Write Protect: GPIO48 */ - {48, ACTIVE_LOW, get_write_protect_state(), "write protect"}, + {48, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: GPIO22 */ - {22, ACTIVE_LOW, get_recovery_mode_switch(), "recovery"}, + {22, ACTIVE_LOW, !get_recovery_mode_switch(), "recovery"},
/* Hard code the lid switch GPIO to open. */ {-1, ACTIVE_HIGH, 1, "lid"}, diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index 6464ef4..0f5cfbb 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -28,8 +28,8 @@ void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { - {-1, ACTIVE_HIGH, 0, "write protect"}, - {-1, ACTIVE_HIGH, REC_MODE_SETTING, "recovery"}, + {-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"}, + {-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"}, {-1, ACTIVE_HIGH, 1, "lid"}, // force open {-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},