Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62347 )
Change subject: soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume ......................................................................
soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume
We need to save the transfer buffer so we can transfer the cbmem console and timestamps into x86 DRAM.
BUG=b:221231786 TEST=Boot guybrush and verify S0i3 resume works. Also dumped the transfer buffer from the OS and verified the console contents got transferred.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I1d3b34c90e0e18609b0c6a0cdedab35aeefbd84b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62347 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/soc/amd/common/psp_verstage/psp_verstage.c 1 file changed, 5 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index 05f0cda..9d0fb22 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -252,6 +252,11 @@ if (bootmode == PSP_BOOT_MODE_S0i3_RESUME) { psp_verstage_s0i3_resume();
+ post_code(POSTCODE_SAVE_BUFFERS); + retval = save_buffers(); + if (retval) + post_code(retval); + post_code(POSTCODE_UNMAP_FCH_DEVICES); unmap_fch_devices();