Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85372?usp=email )
(
8 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry ......................................................................
soc/intel/pantherlake: Adding device id for Crashlog and Telemetry
This patch adds device id for Crashlog and Telemetry. CPU crashlog record is stored in punit SRAM. Source: EDS 815002
BUG=None TEST=Build fatcat and boot with Panther Lake SoC with added device id.
Signed-off-by: Sowmya Aralguppe sowmya.aralguppe@intel.com Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 Reviewed-on: https://review.coreboot.org/c/coreboot/+/85372 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subratabanik@google.com Reviewed-by: Jamie Ryu jamie.m.ryu@intel.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/sram/sram.c 2 files changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Jamie Ryu: Looks good to me, approved Subrata Banik: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 60a7d17..c882fdc 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4934,6 +4934,7 @@ #define PCI_DID_INTEL_MTL_CRASHLOG_SRAM 0x7d0d #define PCI_DID_INTEL_RPL_CPU_CRASHLOG_SRAM 0xa77d #define PCI_DID_INTEL_RPP_S_PMC_CRASHLOG_SRAM 0x7a27 +#define PCI_DID_INTEL_PTL_PUNIT_CRASHLOG_SRAM 0xb07d
/* Intel Trace Hub */ #define PCI_DID_INTEL_MTL_TRACEHUB 0x7e24 diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c index e63f805..da7022d 100644 --- a/src/soc/intel/common/block/sram/sram.c +++ b/src/soc/intel/common/block/sram/sram.c @@ -35,6 +35,7 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_PTL_H_SRAM, PCI_DID_INTEL_PTL_U_H_SRAM, + PCI_DID_INTEL_PTL_PUNIT_CRASHLOG_SRAM, PCI_DID_INTEL_LNL_SRAM, PCI_DID_INTEL_MTL_SOC_SRAM, PCI_DID_INTEL_MTL_IOE_M_SRAM,