Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
mb/emulation/qemu-armv7: Fix board
Fix multiple issues allowing to boot until "Payload not loaded":
* The FMAP_CACHE was placed in memory mapped flash - Place the FMAP_CACHE in DRAM. * The FMAP_CACHE was overlapping the BOOTBLOCK, which has a default size of 128KiB. - Increase the bootblock size in memlayout to 128KiB to match the FMAP. * The heap in bootblock wasn't usable. - Move the bootblock to DRAM and add custom relocation code. * A FIT payload couldn't be compiled in as the POSTRAM_CBFS_CACHE was missing. - Add the POSTRAM_CBFS_CACHE to memlayout. * The coreboot log is spammed with missing timestamp table error messages - Add TIMESTAMP table to memlayout.
Tested on QEMU armv7 vexpress.
Change-Id: Ib9357a5c059ca179826c5a7e7616a5c688ec2e95 Signed-off-by: Patrick Rudolph siro@das-labor.org --- M src/mainboard/emulation/qemu-armv7/Kconfig M src/mainboard/emulation/qemu-armv7/Makefile.inc A src/mainboard/emulation/qemu-armv7/bootblock_asm.S M src/mainboard/emulation/qemu-armv7/memlayout.ld 4 files changed, 117 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/39187/1
diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index 181f9a4..8c7551f 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -36,6 +36,7 @@ select BOOT_DEVICE_NOT_SPI_FLASH select MISSING_BOARD_RESET select NO_MONOTONIC_TIMER + select BOOTBLOCK_CUSTOM
config MAINBOARD_DIR string diff --git a/src/mainboard/emulation/qemu-armv7/Makefile.inc b/src/mainboard/emulation/qemu-armv7/Makefile.inc index c62915b..8b350af 100644 --- a/src/mainboard/emulation/qemu-armv7/Makefile.inc +++ b/src/mainboard/emulation/qemu-armv7/Makefile.inc @@ -12,6 +12,8 @@ ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ## GNU General Public License for more details.
+bootblock-y += bootblock_asm.S + romstage-y += romstage.c
romstage-y += cbmem.c diff --git a/src/mainboard/emulation/qemu-armv7/bootblock_asm.S b/src/mainboard/emulation/qemu-armv7/bootblock_asm.S new file mode 100644 index 0000000..d2c8b75 --- /dev/null +++ b/src/mainboard/emulation/qemu-armv7/bootblock_asm.S @@ -0,0 +1,106 @@ +/* + * Early initialization code for ARM architecture. + * + * This file is based off of the OMAP3530/ARM Cortex start.S file from Das + * U-Boot, which itself got the file from armboot. + * + * Copyright (c) 2004 Texas Instruments r-woodruff2@ti.com + * Copyright (c) 2001 Marius Gröger mag@sysgo.de + * Copyright (c) 2002 Alex Züpke azu@sysgo.de + * Copyright (c) 2002 Gary Jennejohn garyj@denx.de + * Copyright (c) 2003 Richard Woodruff r-woodruff2@ti.com + * Copyright (c) 2003 Kshitij kshitij@ti.com + * Copyright (c) 2006-2008 Syed Mohammed Khasim x0khasim@ti.com + * Copyright (c) 2013 The Chromium OS Authors + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/asm.h> +.arm + +ENTRY(_start) + /* + * Set the CPU to System mode with IRQ and FIQ disabled. Prefetch/Data + * aborts may happen early and crash before the abort handlers are + * installed, but at least the problem will show up near the code that + * causes it. + */ + msr cpsr_cxf, #0xdf + + /* + * From Cortex-A Series Programmer's Guide: + * Only CPU 0 performs initialization. Other CPUs go into WFI + * to do this, first work out which CPU this is + * this code typically is run before any other initialization step + */ + mrc p15, 0, r1, c0, c0, 5 @ Read Multiprocessor Affinity Register + and r1, r1, #0x3 @ Extract CPU ID bits + cmp r1, #0 + bne wait_for_interrupt @ If this is not core0, wait + + ldr r0, =_bootblock + ldr r1, =_ebootblock + adr r2, _start + + cmp r0, r2 + beq relocated + +relocate_program: + ldmia r2!, {r9-r10} + stmia r0!, {r9-r10} + cmp r0, r1 + bne relocate_program + + /* Jump to it... */ + ldr r0, =_bootblock + adr r1, _start + add lr, r0, r1 + mov pc, lr + +relocated: + /* + * Initialize the stack to a known value. This is used to check for + * stack overflow later in the boot process. + */ + ldr r0, =_stack + ldr r1, =_estack + ldr r2, =0xdeadbeef +init_stack_loop: + str r2, [r0] + add r0, #4 + cmp r0, r1 + bne init_stack_loop + +/* Set stackpointer in internal RAM to call bootblock main() */ +call_bootblock: + ldr sp, =_estack /* Set up stack pointer */ + ldr r0,=0x00000000 + /* + * The current design of cpu_info places the + * struct at the top of the stack. The number of + * words pushed must be at least as large as that + * struct. + */ + push {r0-r2} + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ + /* + * Use "bl" instead of "b" even though we do not intend to return. + * "bl" gets compiled to "blx" if we're transitioning from ARM to + * Thumb. However, "b" will not and GCC may attempt to create a + * wrapper which is currently broken. + */ + bl main + +wait_for_interrupt: + wfi + mov pc, lr @ back to my caller +ENDPROC(_start) diff --git a/src/mainboard/emulation/qemu-armv7/memlayout.ld b/src/mainboard/emulation/qemu-armv7/memlayout.ld index 2b33cb3..3fa2234 100644 --- a/src/mainboard/emulation/qemu-armv7/memlayout.ld +++ b/src/mainboard/emulation/qemu-armv7/memlayout.ld @@ -41,14 +41,16 @@ { /* TODO: does this thing emulate SRAM? */
- BOOTBLOCK(0x00000, 64K) - FMAP_CACHE(0x10000, 2K) + REGION(flash, 0, CONFIG_ROM_SIZE, 4K)
DRAM_START(0x60000000) STACK(0x60000000, 64K) - ROMSTAGE(0x60010000, 128K) - RAMSTAGE(0x60030000, 16M) - + BOOTBLOCK(0x60010000, 128K) + FMAP_CACHE(0x60030000, 4K) + TIMESTAMP(0x60031000, 1K) /* TODO: Implement MMU support and move TTB to a better location. */ - TTB(0x61030000, 16K) + TTB(0x60034000, 16K) + ROMSTAGE(0x60038000, 128K) + RAMSTAGE(0x60060000, 16M) + POSTRAM_CBFS_CACHE(0x61060000, 8M) }
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 1: Code-Review+1
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 1:
(6 comments)
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-armv7/bootblock_asm.S:
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 37: msr cpsr_cxf, #0xdf Would suggest transitioning to Thumb immediately, like the default code.
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 38: You should call arm_init_caches somewhere. Better to standardize CPU init stuff in one function, and it turns the icache on for you which you want (assuming that even makes a difference on QEMU, not sure).
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 55: beq relocated This whole calling-_start-twice thing seems unnecessarily roundabout. Why not just make another function for the post-relocation entry point?
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 59: stmia r0!, {r9-r10} Why not just call memcpy()?
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 67: mov pc, lr nit: odd way to spell "bl lr"?
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 94: bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ cpu_info has been removed a long time ago. Where did you copy this stuff from?
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Julius Werner, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39187
to look at the new patch set (#2).
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
mb/emulation/qemu-armv7: Fix board
Fix multiple issues allowing to boot until "Payload not loaded":
* The FMAP_CACHE was placed in memory mapped flash - Place the FMAP_CACHE in DRAM. * The FMAP_CACHE was overlapping the BOOTBLOCK, which has a default size of 128KiB. - Increase the bootblock size in memlayout to 128KiB to match the FMAP. * The heap in bootblock wasn't usable. - Add a linking check in armv7 common bootblock to relocate itself to the linked address. * A FIT payload couldn't be compiled in as the POSTRAM_CBFS_CACHE was missing. - Add the POSTRAM_CBFS_CACHE to memlayout. * The coreboot log is spammed with missing timestamp table error messages - Add TIMESTAMP table to memlayout.
Tested on QEMU armv7 vexpress.
Change-Id: Ib9357a5c059ca179826c5a7e7616a5c688ec2e95 Signed-off-by: Patrick Rudolph siro@das-labor.org --- M src/arch/arm/armv7/bootblock.S M src/mainboard/emulation/qemu-armv7/memlayout.ld 2 files changed, 39 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/39187/2
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 2:
(6 comments)
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-armv7/bootblock_asm.S:
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 37: msr cpsr_cxf, #0xdf
Would suggest transitioning to Thumb immediately, like the default code.
using common code instead
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 38:
You should call arm_init_caches somewhere. […]
using common code instead
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 55: beq relocated
This whole calling-_start-twice thing seems unnecessarily roundabout. […]
Fixed by jumping to "relocated" label after relocation was done instead of jumping to "_start".
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 59: stmia r0!, {r9-r10}
Why not just call memcpy()?
I tried that but it doesn't work. as it's only 3 instructions I didn't investigated further.
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 67: mov pc, lr
nit: odd way to spell "bl lr"?
no "bl" modifies the state while "mov pc" doesn't. If lr bit 0 isn't set it transistions to arm instruction mode.
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 94: bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
cpu_info has been removed a long time ago. […]
no idea. used common code instead so this isn't applicable any more.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/c/coreboot/+/39187/2/src/arch/arm/armv7/bootbloc... File src/arch/arm/armv7/bootblock.S:
https://review.coreboot.org/c/coreboot/+/39187/2/src/arch/arm/armv7/bootbloc... PS2, Line 70: _ebootblock Actually, this needs to be _eprogram, not _ebootblock (and for consistency the start should probably be _program, although there it makes no difference). _eprogram is for the actual size linked, _ebootblock is for however much is reserved for it in memlayout.
https://review.coreboot.org/c/coreboot/+/39187/2/src/arch/arm/armv7/bootbloc... PS2, Line 73: ldmia r2!, {r7-r8} How confident are we that program segment sizes will always be divisible by 8? Is there any guarantee for that (I'm not aware of any)?
Would be another good reason to use memcpy() if you can make it work.
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-armv7/bootblock_asm.S:
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 59: stmia r0!, {r9-r10}
I tried that but it doesn't work. as it's only 3 instructions I didn't investigated further.
Oh shit, yeah, the memcpy() for arm32 actually uses the stack. That would be why. Maybe just move the relocation to after the stack initialization?
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 67: mov pc, lr
no "bl" modifies the state while "mov pc" doesn't. […]
Sorry, you're right. Forgot the details about how this works.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 2: Code-Review+1
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 2: Code-Review+1
Tested with Debian tool chain. Without this patch, nothing on the serial console, with the patch it succeeds:
``` $ arm-linux-gnueabi-gcc-9 --version arm-linux-gnueabi-gcc-9 (Debian 9.3.0-8) 9.3.0 Copyright (C) 2019 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
$ qemu-system-arm --version QEMU emulator version 5.0.0 (Debian 1:5.0-5) Copyright (c) 2003-2020 Fabrice Bellard and the QEMU Project developers $ qemu-system-arm -M vexpress-a9 -bios /dev/shm/coreboot-arm.rom -L /dev/shm -smp cpus=2 -m 1G -serial stdio -net nic -net user,hostfwd=tcp::22222-:22 pulseaudio: set_sink_input_volume() failed pulseaudio: Reason: Invalid argument pulseaudio: set_sink_input_mute() failed pulseaudio: Reason: Invalid argument
coreboot-4.11-2652-g4e37b6da22 Thu May 14 21:13:59 UTC 2020 bootblock starting (log level: 7)... Exception handlers installed. FMAP: Found "FLASH" version 1.1 at 0x20000. FMAP: base = 0x0 size = 0x400000 #areas = 4 FMAP: area COREBOOT found @ 20200 (4062720 bytes) CBFS: Locating 'fallback/romstage' CBFS: Found @ offset 80 size 26e7
coreboot-4.11-2652-g4e37b6da22 Thu May 14 21:13:59 UTC 2020 romstage starting (log level: 7)... FMAP: area COREBOOT found @ 20200 (4062720 bytes) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 27c0 size 4b0b RAMDETECT: Found 1024 MiB RAM
coreboot-4.11-2652-g4e37b6da22 Thu May 14 21:13:59 UTC 2020 ramstage starting (log level: 7)... Exception handlers installed. Enumerating buses... RAMDETECT: Found 1024 MiB RAM 1024 MiB of RAM discovered CBMEM: IMD: root @ 0x9ffff000 254 entries. IMD: root @ 0x9fffec00 62 entries. Root Device scanning... I2C: 00:06 enabled scan_bus: bus Root Device finished in 0 msecs done Allocating resources... Reading resources... I2C: 00:06 missing read_resources Done reading resources. Setting resources... Done setting resources. Done allocating resources. Enabling resources... done. Initializing devices... Devices initialized Finalize devices... Devices finalized Writing coreboot table at 0x9ffdc000 0. 0000000060000000-000000006000ffff: RAMSTAGE 1. 0000000060010000-0000000060033fff: RAM 2. 0000000060034000-0000000060037fff: RAMSTAGE 3. 0000000060038000-000000006005ffff: RAM 4. 0000000060060000-000000006006ffff: RAMSTAGE 5. 0000000060070000-000000009ffdbfff: RAM 6. 000000009ffdc000-000000009fffffff: CONFIGURATION TABLES WARNING: Post-RAM FMAP access too early for cache! FMAP: Found "FLASH" version 1.1 at 0x20000. FMAP: base = 0x0 size = 0x400000 #areas = 4 FMAP: area COREBOOT found @ 20200 (4062720 bytes) Wrote coreboot table at: 0x9ffdc000, 0x188 bytes, checksum 5701 coreboot table: 416 bytes. IMD ROOT 0. 0x9ffff000 0x00001000 IMD SMALL 1. 0x9fffe000 0x00001000 CONSOLE 2. 0x9ffde000 0x00020000 COREBOOT 3. 0x9ffdc000 0x00002000 IMD small region: IMD ROOT 0. 0x9fffec00 0x00000400 FMAP: area COREBOOT found @ 20200 (4062720 bytes) CBFS: Locating 'fallback/payload' CBFS: 'fallback/payload' not found. Payload not loaded. ```
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Paul Menzel, Angel Pons, Julius Werner, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39187
to look at the new patch set (#3).
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
mb/emulation/qemu-armv7: Fix board
Fix multiple issues allowing to boot until "Payload not loaded":
* The FMAP_CACHE was placed in memory mapped flash - Place the FMAP_CACHE in DRAM. * The FMAP_CACHE was overlapping the BOOTBLOCK, which has a default size of 128KiB. - Increase the bootblock size in memlayout to 128KiB to match the FMAP. * The heap in bootblock wasn't usable. - Add a linking check in armv7 common bootblock to relocate itself to the linked address. * A FIT payload couldn't be compiled in as the POSTRAM_CBFS_CACHE was missing. - Add the POSTRAM_CBFS_CACHE to memlayout. * The coreboot log is spammed with missing timestamp table error messages - Add TIMESTAMP table to memlayout.
Tested on QEMU armv7 vexpress.
Change-Id: Ib9357a5c059ca179826c5a7e7616a5c688ec2e95 Signed-off-by: Patrick Rudolph siro@das-labor.org --- M src/arch/arm/armv7/bootblock.S M src/mainboard/emulation/qemu-armv7/memlayout.ld 2 files changed, 39 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/39187/3
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39187/2/src/arch/arm/armv7/bootbloc... File src/arch/arm/armv7/bootblock.S:
https://review.coreboot.org/c/coreboot/+/39187/2/src/arch/arm/armv7/bootbloc... PS2, Line 70: _ebootblock
Actually, this needs to be _eprogram, not _ebootblock (and for consistency the start should probably […]
Done
https://review.coreboot.org/c/coreboot/+/39187/2/src/arch/arm/armv7/bootbloc... PS2, Line 73: ldmia r2!, {r7-r8}
How confident are we that program segment sizes will always be divisible by 8? Is there any guarante […]
Done
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-armv7/bootblock_asm.S:
https://review.coreboot.org/c/coreboot/+/39187/1/src/mainboard/emulation/qem... PS1, Line 59: stmia r0!, {r9-r10}
Oh shit, yeah, the memcpy() for arm32 actually uses the stack. That would be why. […]
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 3: Code-Review+1
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 3: Code-Review+2
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39187 )
Change subject: mb/emulation/qemu-armv7: Fix board ......................................................................
mb/emulation/qemu-armv7: Fix board
Fix multiple issues allowing to boot until "Payload not loaded":
* The FMAP_CACHE was placed in memory mapped flash - Place the FMAP_CACHE in DRAM. * The FMAP_CACHE was overlapping the BOOTBLOCK, which has a default size of 128KiB. - Increase the bootblock size in memlayout to 128KiB to match the FMAP. * The heap in bootblock wasn't usable. - Add a linking check in armv7 common bootblock to relocate itself to the linked address. * A FIT payload couldn't be compiled in as the POSTRAM_CBFS_CACHE was missing. - Add the POSTRAM_CBFS_CACHE to memlayout. * The coreboot log is spammed with missing timestamp table error messages - Add TIMESTAMP table to memlayout.
Tested on QEMU armv7 vexpress.
Change-Id: Ib9357a5c059ca179826c5a7e7616a5c688ec2e95 Signed-off-by: Patrick Rudolph siro@das-labor.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/39187 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/arm/armv7/bootblock.S M src/mainboard/emulation/qemu-armv7/memlayout.ld 2 files changed, 39 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/arch/arm/armv7/bootblock.S b/src/arch/arm/armv7/bootblock.S index e1879c0..47813a7 100644 --- a/src/arch/arm/armv7/bootblock.S +++ b/src/arch/arm/armv7/bootblock.S @@ -62,14 +62,43 @@ cmp r0, r1 bne init_stack_loop
+ /* Set stackpointer in internal RAM */ + ldr sp, =_estack + + /* + * For platforms where the flash is memory mapped (qemu), check if the + * bootblock needs to relocate itself. + */ +check_position: + adr r0, check_position + ldr r1, =check_position + + cmp r0, r1 + beq call_bootblock + + /* Calculate source */ + ldr r2, =_program + sub r1, r1, r2 + sub r1, r0, r1 + /* Get destination */ + ldr r0, =_program + /* Get size */ + ldr r2, =_eprogram + sub r2, r2, r0 + + bl memcpy + + /* Get absolute address */ + ldr lr, =call_bootblock + /* Directly modify pc as branch instruction changes the state */ + mov pc, lr + call_bootblock:
/* Restore parameter passed in by maskrom/vendor firmware. */ ldr r0, =maskrom_param str r10, [r0]
- /* Set stackpointer in internal RAM to call bootblock main() */ - ldr sp, =_estack ldr r0,=0x00000000 /* * The current design of cpu_info places the struct at the top of the diff --git a/src/mainboard/emulation/qemu-armv7/memlayout.ld b/src/mainboard/emulation/qemu-armv7/memlayout.ld index 9d76d9d..4ddc6d2 100644 --- a/src/mainboard/emulation/qemu-armv7/memlayout.ld +++ b/src/mainboard/emulation/qemu-armv7/memlayout.ld @@ -28,14 +28,16 @@ { /* TODO: does this thing emulate SRAM? */
- BOOTBLOCK(0x00000, 64K) - FMAP_CACHE(0x10000, 2K) + REGION(flash, 0, CONFIG_ROM_SIZE, 4K)
DRAM_START(0x60000000) STACK(0x60000000, 64K) - ROMSTAGE(0x60010000, 128K) - RAMSTAGE(0x60030000, 16M) - + BOOTBLOCK(0x60010000, 128K) + FMAP_CACHE(0x60030000, 4K) + TIMESTAMP(0x60031000, 1K) /* TODO: Implement MMU support and move TTB to a better location. */ - TTB(0x61030000, 16K) + TTB(0x60034000, 16K) + ROMSTAGE(0x60038000, 128K) + RAMSTAGE(0x60060000, 16M) + POSTRAM_CBFS_CACHE(0x61060000, 8M) }
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Julius Werner (Code Review)
-
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)