Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61348 )
Change subject: mb/google/brya: Fill in gpio.h for nissa baseboard ......................................................................
mb/google/brya: Fill in gpio.h for nissa baseboard
BUG=b:197479026 TEST=abuild -a -x -c max -p none -t google/brya -b nivviks abuild -a -x -c max -p none -t google/brya -b nereid
Change-Id: I7ec4b9368e0a63c0c0c9a92c8367a89d57f10d51 Signed-off-by: Reka Norman rekanorman@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/61348 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kangheui Won khwon@chromium.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h 1 file changed, 10 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Kangheui Won: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h b/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h index 9ca9ee7..068aaa4 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h +++ b/src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h @@ -6,10 +6,15 @@ #include <soc/gpe.h> #include <soc/gpio.h>
-/* TODO: Set the correct values */ -#define EC_SCI_GPI 0 -#define GPIO_PCH_WP 0 -#define GPIO_EC_IN_RW 0 -#define GPIO_SLP_S0_GATE 0 +/* eSPI virtual wire reporting */ +#define EC_SCI_GPI GPE0_ESPI +/* EC wake is EC_SOC_WAKE_ODL which is routed to GPP_F17 */ +#define GPE_EC_WAKE GPE0_DW2_17 +/* WP signal to PCH */ +#define GPIO_PCH_WP GPP_E12 +/* EC in RW or RO */ +#define GPIO_EC_IN_RW GPP_F18 +/* GPIO IRQ for tight timestamps */ +#define EC_SYNC_IRQ GPD2_IRQ
#endif /* __BASEBOARD_GPIO_H__ */
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.
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Felix Held (Code Review)