[L] Change in coreboot[main]: mb/asrock: Add SPR 1S server board ASRock Rack SPC741D8-2L2T/BCM

[Felix Singer (Code Review)]

Attention is currently required from: Angel Pons, Fabian Meyer, Paul Menzel.

Felix Singer has posted comments on this change by Fabian Meyer. ( https://review.coreboot.org/c/coreboot/+/82203?usp=email )

Change subject: mb/asrock: Add SPR 1S server board ASRock Rack SPC741D8-2L2T/BCM
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Patch Set 9:

(6 comments)

Patchset:

PS9: 
Would you be interested in listed as a maintainer for this mainboard? If so, please add an entry to the MAINTAINERS file as well.

File src/mainboard/asrock/spc741d8/Kconfig:

PS9: 
Missing SPDX license identifier

https://review.coreboot.org/c/coreboot/+/82203/comment/2e61827c_872ca6dc?usp... :
PS9, Line 37: config DEBUG_SMI
            : 	d
Is it needed to enable that by default?

File src/mainboard/asrock/spc741d8/Kconfig.name:

PS9: 
Missing SPDX license identifier

File src/mainboard/asrock/spc741d8/Makefile.mk:

https://review.coreboot.org/c/coreboot/+/82203/comment/88bb0555_21c767ca?usp... :
PS9, Line 5: romstage-y += util.c
Just a thought.. There's only one function in it, which is guarded by PP condition. You could let the build system decide if the file should be even compiled in or not, I guess.

```suggestion
romstage-$(SOC_INTEL_HAS_CXL) += util.c
```

https://review.coreboot.org/c/coreboot/+/82203/comment/4023a003_72606dde?usp... :
PS9, Line 7: ramstage-y += util.c
Same here.

```suggestion
ramstage-$(SOC_INTEL_HAS_CXL) += util.c
```