[XS] Change in coreboot[main]: mb/google/brya/mithrax: Fix mux_conn index

[Won Chung (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik.

Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81354?usp=email )

Change subject: mb/google/brya/mithrax: Fix mux_conn index
......................................................................

mb/google/brya/mithrax: Fix mux_conn index

Within ec_acpi.c, USB-C ports are iterated to be matched with
corresponding mux. The iteration happens from 0 to the number of USB-C
ports. Given iteration index i, the port with PLD group_token of (i+1)
is matched with mux_conn[i].

Mithrax devicetree matches conn1 to mux_conn[1] and conn2 to
mux_conn[0]. However, conn1 is for usbX_port2 which has group_token of 1
and conn2 is for usbX_port3 which has group_token of 2. Thus, follow the
convention to add conn1 to mux_conn[0] and conn2 to mux_conn[1].

Otherwise, the kernel subsystem linking between Type C connector and USB
mux will be swapped.

BUG=b:329657774 b:121287022
TEST=todo

Change-Id: I349682a6fe3fe4848e4e86d9c446530a31b35875
---
M src/mainboard/google/brya/variants/mithrax/overridetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/81354/1

diff --git a/src/mainboard/google/brya/variants/mithrax/overridetree.cb b/src/mainboard/google/brya/variants/mithrax/overridetree.cb
index 49dfea8..6075351 100644
--- a/src/mainboard/google/brya/variants/mithrax/overridetree.cb
+++ b/src/mainboard/google/brya/variants/mithrax/overridetree.cb
@@ -297,8 +297,8 @@
    	end
    	device ref pch_espi on
    		chip ec/google/chromeec
-				use conn1 as mux_conn[1]
-				use conn2 as mux_conn[0]
+				use conn1 as mux_conn[0]
+				use conn2 as mux_conn[1]
    			device pnp 0c09.0 on end
    		end
    	end