Change in coreboot[master]: soc/amd/picasso/cpu: move get_cpu_count to common code

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50406 )

Change subject: soc/amd/picasso/cpu: move get_cpu_count to common code
......................................................................

soc/amd/picasso/cpu: move get_cpu_count to common code

Signed-off-by: Felix Held 
Change-Id: I0690787f492d764a20a4219822eb10fb5cd86de0
---
M src/soc/amd/common/block/cpu/noncar/Makefile.inc
A src/soc/amd/common/block/cpu/noncar/cpu.c
M src/soc/amd/common/block/include/amdblocks/cpu.h
M src/soc/amd/picasso/acpi.c
M src/soc/amd/picasso/agesa_acpi.c
M src/soc/amd/picasso/cpu.c
M src/soc/amd/picasso/include/soc/cpu.h
7 files changed, 14 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/50406/1

diff --git a/src/soc/amd/common/block/cpu/noncar/Makefile.inc b/src/soc/amd/common/block/cpu/noncar/Makefile.inc
index dd95941..808679d 100644
--- a/src/soc/amd/common/block/cpu/noncar/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/noncar/Makefile.inc
@@ -3,6 +3,7 @@
 bootblock-y += pre_c.S
 bootblock-y += write_resume_eip.c
 romstage-y += memmap.c
+ramstage-y += cpu.c
 ramstage-y += memmap.c

endif # CONFIG_SOC_AMD_COMMON_BLOCK_NONCAR
diff --git a/src/soc/amd/common/block/cpu/noncar/cpu.c b/src/soc/amd/common/block/cpu/noncar/cpu.c
new file mode 100644
index 0000000..7c1daf9
--- /dev/null
+++ b/src/soc/amd/common/block/cpu/noncar/cpu.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/cpu.h>
+#include <cpu/cpu.h>
+
+int get_cpu_count(void)
+{
+	return 1 + (cpuid_ecx(0x80000008) & 0xff);
+}
diff --git a/src/soc/amd/common/block/include/amdblocks/cpu.h b/src/soc/amd/common/block/include/amdblocks/cpu.h
index 0a93643..50300d5 100644
--- a/src/soc/amd/common/block/include/amdblocks/cpu.h
+++ b/src/soc/amd/common/block/include/amdblocks/cpu.h
@@ -3,6 +3,7 @@
 #ifndef AMD_BLOCK_CPU_H
 #define AMD_BLOCK_CPU_H

+int get_cpu_count(void);
 void write_resume_eip(void);

#endif /* AMD_BLOCK_CPU_H */
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index eba9dfe..2f08dce 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -19,9 +19,9 @@
 #include <device/pci.h>
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/acpi.h>
+#include <amdblocks/cpu.h>
 #include <soc/acpi.h>
 #include <soc/pci_devs.h>
-#include <soc/cpu.h>
 #include <soc/msr.h>
 #include <soc/southbridge.h>
 #include <soc/nvs.h>
diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c
index 6020ec0..119dd55 100644
--- a/src/soc/amd/picasso/agesa_acpi.c
+++ b/src/soc/amd/picasso/agesa_acpi.c
@@ -12,7 +12,7 @@
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
-#include <soc/cpu.h>
+#include <amdblocks/cpu.h>
 #include <soc/data_fabric.h>
 #include <soc/pci_devs.h>
 #include <stdlib.h>
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index 5979fc6..b18a3b4 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <amdblocks/cpu.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/mtrr.h>
@@ -41,11 +42,6 @@
    x86_mtrr_check();
 }

-int get_cpu_count(void)
-{
-	return 1 + (cpuid_ecx(0x80000008) & 0xff);
-}
-
 static void set_cstate_io_addr(void)
 {
    msr_t cst_addr;
diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h
index 3f6cd24..79d5cc6 100644
--- a/src/soc/amd/picasso/include/soc/cpu.h
+++ b/src/soc/amd/picasso/include/soc/cpu.h
@@ -3,7 +3,6 @@
 #ifndef AMD_PICASSO_CPU_H
 #define AMD_PICASSO_CPU_H

-int get_cpu_count(void);
 void check_mca(void);

#define RAVEN1_B0_CPUID			0x00810f10