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Hello build bot (Jenkins), Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Werner Zeh, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/elkhartlake: Update FADT table
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soc/intel/elkhartlake: Update FADT table
Update FADT table per relevant PM settings:
Fix PM Timer block access size and disable C2 and C3 states for the CPU.
Further on, set the century byte offset in FADT to point to the common location in CMOS.
Signed-off-by: Lean Sheng Tan lean.sheng.tan@intel.com
Change-Id: I72a57bf8ec61c3eabc4522c2695ae4b16979f188
---
M src/soc/intel/elkhartlake/acpi.c
1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/54958/4
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I72a57bf8ec61c3eabc4522c2695ae4b16979f188
Gerrit-Change-Number: 54958
Gerrit-PatchSet: 4
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