Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/devices/pci_ids: add IDs for new AMD SoCs ......................................................................
include/devices/pci_ids: add IDs for new AMD SoCs
Change-Id: I0caea5627045b7855e2c5f3cb01d4fa21332788b Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/include/device/pci_ids.h 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/47703/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5095f11..10abdf7 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -301,11 +301,13 @@ #define PCI_DEVICE_ID_AMD_16H_MODEL_000F_NB_HT 0x1536 #define PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_HT 0x1566 #define PCI_DEVICE_ID_AMD_17H_MODEL_101F_NB 0x15d0 +#define PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB 0x1630 #define PCI_DEVICE_ID_AMD_15H_MODEL_101F_NB_IOMMU 0x1419 #define PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU 0x1423 #define PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU 0x1577 #define PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_IOMMU 0x1567 #define PCI_DEVICE_ID_AMD_17H_MODEL_1020_NB_IOMMU 0x15D1 +#define PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB_IOMMU 0x1631
#define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D #define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380 @@ -454,13 +456,17 @@ #define PCI_DEVICE_ID_AMD_CZ_SMBUS 0x790B
#define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP 0x15D3 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_1 0x1633 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_2 0x1634 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSA 0x15DB #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSB 0x15DC +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC 0x1635 #define PCI_DEVICE_ID_AMD_FAM17H_ACP 0x15E2 #define PCI_DEVICE_ID_AMD_FAM17H_HDA1 0x15E3 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI0 0x15E0 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI1 0x15E1 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL20H_XHCI0 0x15E5 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_XHCI 0x1639 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF0 0x15E8 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF1 0x15E9 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF2 0x15EA @@ -468,6 +474,22 @@ #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF4 0x15EC #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF5 0x15ED #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF6 0x15EE +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF0 0x1448 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF1 0x1449 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF2 0x144A +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF3 0x144B +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF4 0x144C +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF5 0x144D +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF6 0x144E +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF7 0x144F +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF0 0x166A +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF1 0x166B +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF2 0x166C +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF3 0x166D +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF4 0x166E +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF5 0x166F +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF6 0x1670 +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF7 0x1617 #define PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_VER0 0x7901 #define PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_VER1 0x7904 #define PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_RAID_VER0 0x7916 @@ -476,9 +498,15 @@ #define PCI_DEVICE_ID_AMD_FAM17H_SMBUS 0x790B #define PCI_DEVICE_ID_AMD_FAM17H_LPC 0x790E #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_GBE 0x1458 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_GBE 0x1641 +#define PCI_DEVICE_ID_AMD_FAM17H_I2S_AC97 0x1644
#define PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_GPU 0x15D8 +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL60H_GPU 0x1636 +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL68H_GPU 0x164C +#define PCI_DEVICE_ID_ATI_FAM19H_MODEL51H_GPU 0x1638 #define PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_HDA0 0x15DE +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL60H_HDA0 0x1637
#define PCI_VENDOR_ID_VLSI 0x1004 #define PCI_DEVICE_ID_VLSI_82C592 0x0005
Felix Held has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
include/device/pci_ids: add PCI IDs for new AMD SoCs
Change-Id: I0caea5627045b7855e2c5f3cb01d4fa21332788b Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/include/device/pci_ids.h 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/47703/2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... PS3, Line 459: PCIE_GPP_1 Since there are multiples of these and it doesn't mean port 1, port 2, etc., maybe using PCI_GPP_D1 and _D2 would make it more clear. I'm OK either way. The clarity will need to be in the soc directory.
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... PS3, Line 492: 0x1617 0x1671?
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47703
to look at the new patch set (#4).
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
include/device/pci_ids: add PCI IDs for new AMD SoCs
Change-Id: I0caea5627045b7855e2c5f3cb01d4fa21332788b Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/include/device/pci_ids.h 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/47703/4
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... PS3, Line 459: PCIE_GPP_1
Since there are multiples of these and it doesn't mean port 1, port 2, etc. […]
good idea
https://review.coreboot.org/c/coreboot/+/47703/3/src/include/device/pci_ids.... PS3, Line 492: 0x1617
0x1671?
yep, that was a typo
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
Patch Set 4: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47703 )
Change subject: include/device/pci_ids: add PCI IDs for new AMD SoCs ......................................................................
include/device/pci_ids: add PCI IDs for new AMD SoCs
Change-Id: I0caea5627045b7855e2c5f3cb01d4fa21332788b Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/47703 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/include/device/pci_ids.h 1 file changed, 28 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 5095f11..ebf02a8 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -301,11 +301,13 @@ #define PCI_DEVICE_ID_AMD_16H_MODEL_000F_NB_HT 0x1536 #define PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_HT 0x1566 #define PCI_DEVICE_ID_AMD_17H_MODEL_101F_NB 0x15d0 +#define PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB 0x1630 #define PCI_DEVICE_ID_AMD_15H_MODEL_101F_NB_IOMMU 0x1419 #define PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU 0x1423 #define PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU 0x1577 #define PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_IOMMU 0x1567 #define PCI_DEVICE_ID_AMD_17H_MODEL_1020_NB_IOMMU 0x15D1 +#define PCI_DEVICE_ID_AMD_17H_MODEL_606F_NB_IOMMU 0x1631
#define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D #define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380 @@ -454,13 +456,17 @@ #define PCI_DEVICE_ID_AMD_CZ_SMBUS 0x790B
#define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP 0x15D3 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1 0x1633 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2 0x1634 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSA 0x15DB #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSB 0x15DC +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC 0x1635 #define PCI_DEVICE_ID_AMD_FAM17H_ACP 0x15E2 #define PCI_DEVICE_ID_AMD_FAM17H_HDA1 0x15E3 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI0 0x15E0 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_XHCI1 0x15E1 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL20H_XHCI0 0x15E5 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_XHCI 0x1639 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF0 0x15E8 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF1 0x15E9 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF2 0x15EA @@ -468,6 +474,22 @@ #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF4 0x15EC #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF5 0x15ED #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF6 0x15EE +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF0 0x1448 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF1 0x1449 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF2 0x144A +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF3 0x144B +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF4 0x144C +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF5 0x144D +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF6 0x144E +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_DF7 0x144F +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF0 0x166A +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF1 0x166B +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF2 0x166C +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF3 0x166D +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF4 0x166E +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF5 0x166F +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF6 0x1670 +#define PCI_DEVICE_ID_AMD_FAM19H_MODEL51H_DF7 0x1671 #define PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_VER0 0x7901 #define PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_VER1 0x7904 #define PCI_DEVICE_ID_AMD_FAM17H_SATA_AHCI_RAID_VER0 0x7916 @@ -476,9 +498,15 @@ #define PCI_DEVICE_ID_AMD_FAM17H_SMBUS 0x790B #define PCI_DEVICE_ID_AMD_FAM17H_LPC 0x790E #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_GBE 0x1458 +#define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_GBE 0x1641 +#define PCI_DEVICE_ID_AMD_FAM17H_I2S_AC97 0x1644
#define PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_GPU 0x15D8 +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL60H_GPU 0x1636 +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL68H_GPU 0x164C +#define PCI_DEVICE_ID_ATI_FAM19H_MODEL51H_GPU 0x1638 #define PCI_DEVICE_ID_ATI_FAM17H_MODEL18H_HDA0 0x15DE +#define PCI_DEVICE_ID_ATI_FAM17H_MODEL60H_HDA0 0x1637
#define PCI_VENDOR_ID_VLSI 0x1004 #define PCI_DEVICE_ID_VLSI_82C592 0x0005
-
Felix Held (Code Review) -
Marshall Dawson (Code Review)