Change in coreboot[master]: [WIP] AGESA: Fix SMM support in ASEG

[Mike Banon (Code Review)]

Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21624 )

Change subject: [WIP] AGESA: Fix SMM support in ASEG
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Patch Set 8: Code-Review+1

Everything still seems to be working OK with this commit. The only observed difference on G505S is "  ... raise SMI#" at cbmem log:

...
Enabling cache
Setting up local APIC...
 apic_id: 0x13 done.
siblings = 03, Initializing SMM for CPU 3
CPU #3 initialized
All AP CPUs stopped (47 loops)
CPU0: stack: afed4000 - afed5000, lowest used address afed456c, stack used: 2708 bytes
CPU1: stack: afed3000 - afed4000, lowest used address afed3dbc, stack used: 580 bytes
CPU2: stack: afed2000 - afed3000, lowest used address afed2dbc, stack used: 580 bytes
CPU3: stack: afed1000 - afed2000, lowest used address afed1dbc, stack used: 580 bytes
  ... raise SMI#
CPU_CLUSTER: 0 init finished in 85935943 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 0 usecs
PCI: 00:00.0 init ...
...