[M] Change in coreboot[main]: vendorcode/amd/genoa: Parse APOB for DRAM layout

[Felix Held (Code Review)]

Attention is currently required from: Arthur Heymans, Varshit Pandya.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76522?usp=email )

Change subject: vendorcode/amd/genoa: Parse APOB for DRAM layout
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Patch Set 4:

(1 comment)

File src/soc/amd/genoa/device_fabric.c:

PS4: 
for this to work, in the genoa/domain.c file, a new genoa_domain_read_resources function needs to be added and used as read_resources function that first calls the amd_pci_domain_read_resources function and then adds the new code

// We only want to add the DRAM memory map once
if (dev->link_list->secondary == 0) {
    idx = add_opensil_memmap(dev, idx);
}

Since idx isn't and can't be exposed outside of amd_pci_domain_read_resources without causing some other problems, i'd say that using a sufficiently large index argument (i'd call 0x10000 sufficiently large in this context) for add_opensil_memmap is likely the way to go