Change in ...coreboot[master]: soc/intel/cannonlake: Configure GPIOs again after FSP-S is done

[Duncan Laurie (Code Review)]

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31250 )

Change subject: soc/intel/cannonlake: Configure GPIOs again after FSP-S is done
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Patch Set 3: Code-Review+2

(1 comment)

https://review.coreboot.org/#/c/31250/3/src/soc/intel/cannonlake/chip.c 
File src/soc/intel/cannonlake/chip.c:

https://review.coreboot.org/#/c/31250/3/src/soc/intel/cannonlake/chip.c@159 
PS3, Line 159: PCH_H
I see you said it isn't needed, but is there a downside to enabling?