Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Star Labs, Paul Menzel, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
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Patch Set 15:

(3 comments)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/52800/comment/486121b1_83547925 
PS15, Line 86: 0x03
What is this group ID?

https://review.coreboot.org/c/coreboot/+/52800/comment/e2a8ba1e_dae01721 
PS15, Line 87: 0x03
What is this command?

https://review.coreboot.org/c/coreboot/+/52800/comment/3a97fded_a6109aaf 
PS15, Line 108: oup_id = 0xF0,
              : 			.command = 0x03,
same