Martin Roth (gaumless@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10682
-gerrit
commit f001eba1d2886c6b872edb2671908528c8b96caf Author: Martin Roth gaumless@gmail.com Date: Sun Jun 28 14:06:23 2015 -0600
Calculate HUDSON_FWM_POSITION and display warning on mismatch
This patch calculates the address where the chipset firmware descriptor should be located and compares it against the actual value from Kconfig. If the two don't match, it puts up a warning.
This could probably replace the config variable completely, but I wanted to see how other people felt before doing that. I seem to recall that the value used to be calculated, so I figure that there must be a reason it's done this way at this point.
If we do want to keep the Kconfig setting, this patch could also be modified to just verify that the HUDSON_FWM_POSITION is inside the ROM space.
Change-Id: I94addf463e2c694a94eef218ec855103a3bb5da5 Signed-off-by: Martin Roth gaumless@gmail.com --- src/southbridge/amd/agesa/hudson/Makefile.inc | 5 +++++ src/southbridge/amd/pi/hudson/Makefile.inc | 5 +++++ 2 files changed, 10 insertions(+)
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index ea86a32..85e5596 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -34,8 +34,13 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c # |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | # +-----------+---------------+----------------+------------+ # EC ROM should be 64K aligned. + +HUDSON_FWM_POS_CALC=$(shell let y="0xffffffff - ($(CONFIG_COREBOOT_ROMSIZE_KB) * 1024) + 1 + 0x20000" ; printf "%u\n" $$y) HUDSON_FWM_POSITION=$(shell printf %u $(CONFIG_HUDSON_FWM_POSITION))
+ifneq ($(HUDSON_FWM_POS_CALC), $(HUDSON_FWM_POSITION)) +$(warning ##### WARNING: CONFIG_HUDSON_FWM_POSITION does not match calculated firmware position $(HUDSON_FWM_POS_CALC) != $(HUDSON_FWM_POSITION) ##### ) +endif #assume the cbfs header is less than 128 bytes. ROMSIG_SIZE=16 ifeq ($(CONFIG_HUDSON_XHCI_FWM), y) diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index 235ce1e..f56f3dc 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -58,7 +58,12 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c # # EC ROM should be 64K aligned.
+HUDSON_FWM_POS_CALC=$(shell let y="0xffffffff - ($(CONFIG_COREBOOT_ROMSIZE_KB) * 1024) + 1 + 0x20000" ; printf "%u\n" $$y) HUDSON_FWM_POSITION=$(shell printf %u $(CONFIG_HUDSON_FWM_POSITION)) + +ifneq ($(HUDSON_FWM_POS_CALC), $(HUDSON_FWM_POSITION)) +$(warning ##### WARNING: CONFIG_HUDSON_FWM_POSITION does not match calculated firmware position $(HUDSON_FWM_POS_CALC) != $(HUDSON_FWM_POSITION) ##### ) +endif CBFS_HEADER_SIZE=0x40
#assume the cbfs header is less than $(CBFS_HEADER_SIZE) bytes.