New patch to review for coreboot: a8f7d02 mainboard/asrock/e350m1: Avoid including early_serial.c

[Edward O'Callaghan]

Edward O'Callaghan ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5591

-gerrit

commit a8f7d02b33732814e90d223c907a71c6fbec63ed
Author: Edward O'Callaghan 
Date:   Mon Apr 28 02:07:32 2014 +1000

mainboard/asrock/e350m1: Avoid including early_serial.c

Using generic winbond romstage serial init symbols instead of model
    specific implementation. We do this on a case by case basis as some
    boards are ROMCC and so need to #include .c files. This is a step to
    migrating non-romcc boards to a more generic superio framework.

Change-Id: I56f6d9ec77cd21a612cbbdb48634543f34a2e72c
    Signed-off-by: Edward O'Callaghan 
---
 src/mainboard/asrock/e350m1/romstage.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index bf850a3..7bf5359 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -31,7 +31,8 @@
 #include <cpu/x86/mtrr.h>
 #include "agesawrapper.h"
 #include "cpu/x86/bist.h"
-#include "superio/winbond/w83627hf/early_serial.c"
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627hf/w83627hf.h>
 #include "cpu/x86/lapic.h"
 #include "drivers/pc80/i8254.c"
 #include "drivers/pc80/i8259.c"
@@ -61,7 +62,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
    	sb_Poweron_Init();

post_code(0x31);
-		w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+		winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
    	console_init();
    }