Change in coreboot[master]: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

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Paul Menzel (Code Review)

12 Oct 2020 12 Oct '20

3:01 a.m.

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

Currently, when selecting SUPERIO_NUVOTON_NCT*_COM_A, the whole global control register 0x2a is written to 0x40. CR 0x2a defaults to 0xc0, so indeed bit 7 is cleared, but the device early init code might have set other bits in that control register, so setting it to 0x40 might override already set bits. So, only clear bit 7 and leave the other bits untouched.

Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/superio/nuvoton/common/early_serial.c 1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/46286/1

diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index cc21f40..f0b49c5 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -55,7 +55,7 @@ if (CONFIG(SUPERIO_NUVOTON_NCT5539D_COM_A) || CONFIG(SUPERIO_NUVOTON_NCT6776_COM_A)) /* Route COM A to GPIO8 pin group */ - pnp_write_config(dev, 0x2a, 0x40); + pnp_unset_and_set_config(dev, 0x2a, (1 << 7), 0);

if (CONFIG(SUPERIO_NUVOTON_NCT6791D_COM_A)) /* Route COM A to GPIO8 pin group */

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Paul Menzel (Code Review)

12 Oct 12 Oct

3:04 a.m.

Hello Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46286

to look at the new patch set (#2).

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/46286/2

Nico Huber (Code Review)

13 Oct 13 Oct

1:42 a.m.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 2: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/2/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/2/src/superio/nuvoton/common/... PS2, Line 58: (1 << 7) Parentheses look odd between commas. Could just be me, though.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Angel Pons th3fanbus@gmail.com Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Mon, 12 Oct 2020 22:42:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Felix Held (Code Review)

2:23 p.m.

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 2: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/2/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/2/src/superio/nuvoton/common/... PS2, Line 58: (1 << 7)

...

Parentheses look odd between commas. Could just be me, though.

yeah, those aren't needed; doesn't hurt to have theme there though

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Angel Pons th3fanbus@gmail.com Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 11:23:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber nico.h@gmx.de Gerrit-MessageType: comment

Angel Pons (Code Review)

2:24 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 2:

I'll check if both SIOs use the same bits.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Angel Pons th3fanbus@gmail.com Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 11:24:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

Paul Menzel (Code Review)

6:44 p.m.

Hello build bot (Jenkins), Nico Huber, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46286

to look at the new patch set (#3).

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/46286/3

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Angel Pons th3fanbus@gmail.com Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-MessageType: newpatchset

Angel Pons (Code Review)

8:09 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3: Code-Review+1

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00); Datasheet says this SIO works the same way as the other two.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 17:09:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Nico Huber (Code Review)

8:18 p.m.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00);

...

Datasheet says this SIO works the same way as the other two.

Hmmm, didn't have a datasheet. What about bit 6, though? Different default?

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 17:18:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

8:42 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00);

...

Hmmm, didn't have a datasheet. […]

Looks like I misread the datasheet back in CB:33640 because it has two sections for bit 7: https://imgur.com/D2dpN12.png

Bit 6 controls COM B, as on the other SIOs.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 17:42:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber nico.h@gmx.de Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

8:43 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00);

...

Looks like I misread the datasheet back in CB:33640 because it has two sections for bit 7: https://i […]

https://4donline.ihs.com/images/VipMasterIC/IC/NUTC/NUTC-S-A0001770713/NUTC-...

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 17:43:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber nico.h@gmx.de Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Nico Huber (Code Review)

8:56 p.m.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00);

...

https://4donline.ihs.com/images/VipMasterIC/IC/NUTC/NUTC-S-A0001770713/NUTC-.... […]

Thanks.

So what you could have said is that it has the same default 0xc0 value. And hence clearing bit 6 is spurious. I think that deserves a separate commit, though, as it would change behavior.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 17:56:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber nico.h@gmx.de Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

9 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00);

...

Thanks. […]

Yeah, I forgot how to English lately ._.

I'm fine with having a separate commit. There's just one board with this SIO.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Tue, 13 Oct 2020 18:00:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber nico.h@gmx.de Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

17 Oct 17 Oct

4:12 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... File src/superio/nuvoton/common/early_serial.c:

https://review.coreboot.org/c/coreboot/+/46286/3/src/superio/nuvoton/common/... PS3, Line 62: pnp_write_config(dev, 0x2a, 0x00);

...

Yeah, I forgot how to English lately ._. […]

Done in CB:46521 and CB:46522

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Sat, 17 Oct 2020 13:12:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber nico.h@gmx.de Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Nico Huber (Code Review)

4:34 p.m.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

Patch Set 3: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 3 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-Comment-Date: Sat, 17 Oct 2020 13:34:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Nico Huber (Code Review)

4:34 p.m.

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46286 )

Change subject: superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A ......................................................................

superio/nuvoton: Only set bit 7 of global CR 0x2a for COM A

Fixes: f95daa510d ("superio/nuvoton: Add back Nuvoton NCT6776 support") Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/46286 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Nico Huber nico.h@gmx.de --- M src/superio/nuvoton/common/early_serial.c 1 file changed, 1 insertion(+), 1 deletion(-)

Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, approved

diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c index cc21f40..ed5fdba 100644 --- a/src/superio/nuvoton/common/early_serial.c +++ b/src/superio/nuvoton/common/early_serial.c @@ -55,7 +55,7 @@ if (CONFIG(SUPERIO_NUVOTON_NCT5539D_COM_A) || CONFIG(SUPERIO_NUVOTON_NCT6776_COM_A)) /* Route COM A to GPIO8 pin group */ - pnp_write_config(dev, 0x2a, 0x40); + pnp_unset_and_set_config(dev, 0x2a, 1 << 7, 0);

if (CONFIG(SUPERIO_NUVOTON_NCT6791D_COM_A)) /* Route COM A to GPIO8 pin group */

-- To view, visit https://review.coreboot.org/c/coreboot/+/46286 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ded9dab3985c4c8e5c45af354ef44af482e18c2 Gerrit-Change-Number: 46286 Gerrit-PatchSet: 4 Gerrit-Owner: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Teo Boon Tiong boon.tiong.teo@intel.com Gerrit-MessageType: merged

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participants (4)

Angel Pons (Code Review)
Felix Held (Code Review)
Nico Huber (Code Review)
Paul Menzel (Code Review)