Patch set updated for coreboot: 416a3a7 baytrail: add support to run reference code blob

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4898

-gerrit

commit 416a3a7f6305f7c88f4a4e731c90e63da581b374
Author: Aaron Durbin 
Date:   Thu Oct 24 10:21:43 2013 -0500

baytrail: add support to run reference code blob

The reference code blog is needed to bootstrap
    certain pieces of hardware in bay trail. Provide
    the ability to run reference code by loading
    the reference code as an rmodule.

Note that support for vboot verification and S3
    resume is omitted from this commit.

BUG=chrome-os-partner:22866
    BRANCH=None
    TEST=Built and booted with refcode loading.

Change-Id: I30334db441a57f4d87b4de6fca0a9a48e1c05c05
    Signed-off-by: Aaron Durbin 
    Reviewed-on: https://chromium-review.googlesource.com/174426
    Reviewed-by: Duncan Laurie 
---
 src/soc/intel/baytrail/Makefile.inc           |  1 +
 src/soc/intel/baytrail/baytrail/efi_wrapper.h | 50 ++++++++++++++++++++++
 src/soc/intel/baytrail/baytrail/ramstage.h    |  5 +++
 src/soc/intel/baytrail/ramstage.c             |  3 ++
 src/soc/intel/baytrail/refcode.c              | 60 +++++++++++++++++++++++++++
 5 files changed, 119 insertions(+)

diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index f913f0c..455f015 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -31,6 +31,7 @@ smm-y += pmutil.c
 smm-y += smihandler.c
 ramstage-y += smm.c
 ramstage-y += southcluster.c
+ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c

# Remove as ramstage gets fleshed out
 ramstage-y += placeholders.c
diff --git a/src/soc/intel/baytrail/baytrail/efi_wrapper.h b/src/soc/intel/baytrail/baytrail/efi_wrapper.h
new file mode 100644
index 0000000..6682f95
--- /dev/null
+++ b/src/soc/intel/baytrail/baytrail/efi_wrapper.h
@@ -0,0 +1,50 @@
+/*
+ * PEI EFI entry point
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Google Inc. nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL GOOGLE INC BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __EFI_WRAPPER_H__
+#define __EFI_WRAPPER_H__
+
+#define EFI_WRAPPER_VER 1
+
+/* Provide generic x86 calling conventions. */
+#define ABI_X86 __attribute((regparm(0)))
+
+/* Errors returned by the EFI wrapper. */
+enum efi_wrapper_error {
+	INVALID_VER = -1,
+};
+
+struct efi_wrapper_params {
+	/* Mainboard Inputs */
+	int version;
+
+	void ABI_X86 (*console_out)(unsigned char byte);
+} __attribute__((packed));
+
+typedef int ABI_X86 (*efi_wrapper_entry_t)(struct efi_wrapper_params *);
+#endif
diff --git a/src/soc/intel/baytrail/baytrail/ramstage.h b/src/soc/intel/baytrail/baytrail/ramstage.h
index 790b8c6..eaa8f6b 100644
--- a/src/soc/intel/baytrail/baytrail/ramstage.h
+++ b/src/soc/intel/baytrail/baytrail/ramstage.h
@@ -27,6 +27,11 @@
 void baytrail_init_pre_device(void);
 void baytrail_init_cpus(device_t dev);
 void set_max_freq(void);
+#if CONFIG_HAVE_REFCODE_BLOB
+void baytrail_run_reference_code(void);
+#else
+static inline void baytrail_run_reference_code(void) {}
+#endif

extern struct pci_operations soc_pci_ops;

diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c
index 229e367..896ecfe 100644
--- a/src/soc/intel/baytrail/ramstage.c
+++ b/src/soc/intel/baytrail/ramstage.c
@@ -113,6 +113,9 @@ void baytrail_init_pre_device(void)
    /* Allow for SSE instructions to be executed. */
    write_cr4(read_cr4() | CR4_OSFXSR | CR4_OSXMMEXCPT);

+	/* Run reference code. */
+	baytrail_run_reference_code();
+
    /* Get GPIO initial states from mainboard */
    config = mainboard_get_gpios();
    setup_soc_gpios(config);
diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c
new file mode 100644
index 0000000..59e3c4c
--- /dev/null
+++ b/src/soc/intel/baytrail/refcode.c
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <cbmem.h>
+#include <console/console.h>
+#include <rmodule.h>
+
+#include <baytrail/ramstage.h>
+#include <baytrail/efi_wrapper.h>
+
+static void ABI_X86 send_to_console(unsigned char b)
+{
+	console_tx_byte(b);
+}
+
+void baytrail_run_reference_code(void)
+{
+	int ret;
+	efi_wrapper_entry_t entry;
+	struct efi_wrapper_params wrp = {
+		.version = EFI_WRAPPER_VER,
+		.console_out = send_to_console,
+	};
+	struct rmod_stage_load refcode = {
+		.cbmem_id = CBMEM_ID_REFCODE,
+		.name = "fallback/refcode",
+	};
+
+	if (rmodule_stage_load_from_cbfs(&refcode) || refcode.entry == NULL) {
+		printk(BIOS_DEBUG, "Error loading reference code.\n");
+		return;
+	}
+
+	entry = refcode.entry;
+
+	/* Call into reference code. */
+	ret = entry(&wrp);
+
+	if (ret != 0) {
+		printk(BIOS_DEBUG, "Reference code returned %d\n", ret);
+		return;
+	}
+}
+