Change in coreboot[master]: mb/google/volteer: Configure Type C1 Aux pins

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Nick Vaccaro (Code Review)

8 Apr 2020 8 Apr '20

5:18 p.m.

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

mb/google/volteer: Configure Type C1 Aux pins

Configure Type C1 Aux pins : - GPP_E22(C1_AUXP_DC): GPIO high - GPP_E23(C1_AUXN_DC): GPIO low

BUG=b:146233756 BRANCH=none TEST="emerge-volteer coreboot chromeos-bootimage", flash and verify Volteer boots to kernel.

Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/gpio.c 1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/40280/1

diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c index 1028dfa..955b095 100644 --- a/src/mainboard/google/volteer/variants/baseboard/gpio.c +++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c @@ -239,10 +239,10 @@ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF4), /* E21 : DDP2_CTRLDATA ==> USB_C1_LSX_SOC_RX_STRAP */ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF4), - /* E22 : DDPA_CTRLCLK ==> USB_C1_AUXP_DC: Retimer FW drives this pin */ - PAD_NC(GPP_E22, NONE), - /* E23 : DDPA_CTRLDATA ==> USB_C1_AUXN_DC: Retimer FW drives this pin */ - PAD_NC(GPP_E23, NONE), + /* E22 : DDPA_CTRLCLK ==> USB_C1_AUXP_DC */ + PAD_CFG_GPO(GPP_E22, 1, DEEP), + /* E23 : DDPA_CTRLDATA ==> USB_C1_AUXN_DC */ + PAD_CFG_GPO(GPP_E23, 0, DEEP),

/* F0 : CNV_BRI_DT ==> CNV_BRI_DT_STRAP */ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),

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Caveh Jalali (Code Review)

8 Apr 8 Apr

6:22 p.m.

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

Patch Set 1: Code-Review+1

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Thu, 09 Apr 2020 00:22:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Furquan Shaikh (Code Review)

6:34 p.m.

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40280/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/40280/1/src/mainboard/google/voltee... PS1, Line 242: Retimer FW drives this pin Can you please add some explanation to commit message why these are being configured this way?

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Thu, 09 Apr 2020 00:34:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Paul Menzel (Code Review)

9 Apr 9 Apr

1:49 a.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

Patch Set 1:

(3 comments)

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG@9 PS1, Line 9: Configure Type C1 Aux pins : Please remove the space before the colon.

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG@10 PS1, Line 10: - GPP_E22(C1_AUXP_DC): GPIO high Plesae add a space before the (.

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG@16 PS1, Line 16: Volteer boots to kernel. What works now, that didn’t before?

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 09 Apr 2020 07:49:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Nick Vaccaro (Code Review)

8:30 a.m.

Hello Jes Klinke, build bot (Jenkins), Furquan Shaikh, Caveh Jalali,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40280

to look at the new patch set (#2).

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

mb/google/volteer: Configure Type C1 Aux pins

Configure Type C1 Aux pins as outputs now that there is no longer a retimer on the MLB port driving them: - GPP_E22 (C1_AUXP_DC): GPIO high - GPP_E23 (C1_AUXN_DC): GPIO low

BUG=b:146233756 BRANCH=none TEST="emerge-volteer coreboot chromeos-bootimage", flash and verify Volteer boots to kernel and that GPP_E22 and GPP_E23 are no longer floating.

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/40280/2

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Nick Vaccaro (Code Review)

8:31 a.m.

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

Patch Set 2:

(4 comments)

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG@9 PS1, Line 9: Configure Type C1 Aux pins :

...

Please remove the space before the colon.

Done

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG@10 PS1, Line 10: - GPP_E22(C1_AUXP_DC): GPIO high

...

Plesae add a space before the (.

Done

https://review.coreboot.org/c/coreboot/+/40280/1//COMMIT_MSG@16 PS1, Line 16: Volteer boots to kernel.

...

What works now, that didn’t before?

It's part of a larger solution. This portion makes the GPIOs no longer float.

https://review.coreboot.org/c/coreboot/+/40280/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/40280/1/src/mainboard/google/voltee... PS1, Line 242: Retimer FW drives this pin

...

Can you please add some explanation to commit message why these are being configured this way?

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 09 Apr 2020 14:31:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh furquan@google.com Comment-In-Reply-To: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: comment

Prashant Malani (Code Review)

12:20 p.m.

Prashant Malani has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40280/2//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/40280/2//COMMIT_MSG@9 PS2, Line 9: now that there is no longer a : retimer on the MLB port driving them Doesn't C1 (the "right" port on Volteer) still have the re-timer, via the daughterboards??

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: Prashant Malani pmalani@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-CC: Prashant Malani pmalani@google.com Gerrit-Comment-Date: Thu, 09 Apr 2020 18:20:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Nick Vaccaro (Code Review)

13 Apr 13 Apr

4:06 p.m.

Nick Vaccaro has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/40280 )

Change subject: mb/google/volteer: Configure Type C1 Aux pins ......................................................................

Abandoned

-- To view, visit https://review.coreboot.org/c/coreboot/+/40280 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib01956b55c117a4b4a6cbdbc9e96fd4b7d6ebc8d Gerrit-Change-Number: 40280 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Jes Klinke jbk@chromium.org Gerrit-Reviewer: Prashant Malani pmalani@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-CC: Prashant Malani pmalani@google.com Gerrit-MessageType: abandon

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participants (5)

Caveh Jalali (Code Review)
Furquan Shaikh (Code Review)
Nick Vaccaro (Code Review)
Paul Menzel (Code Review)
Prashant Malani (Code Review)