Change in ...coreboot[master]: drivers/spi/adesto.c: Add the rest of >=1MB Adesto (Atmel) chips
Hello Mike Banon,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/30883
to review the following change.
Change subject: drivers/spi/adesto.c: Add the rest of >=1MB Adesto (Atmel) chips ......................................................................
drivers/spi/adesto.c: Add the rest of >=1MB Adesto (Atmel) chips
Required for ACPI S3 suspend support at some motherboards. Synchronizing with flashchips.c/h flashrom source code.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I8c0e6d8f1487ca90f88d4a56af3fb0e21458ef1e --- M src/drivers/spi/adesto.c 1 file changed, 73 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/30883/1
diff --git a/src/drivers/spi/adesto.c b/src/drivers/spi/adesto.c index 3e3e7d4..5195bec 100644 --- a/src/drivers/spi/adesto.c +++ b/src/drivers/spi/adesto.c @@ -44,15 +44,47 @@
static const struct adesto_spi_flash_params adesto_spi_flash_table[] = { { + .id = 0x4218, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 256, + .name = "AT25SL128A", + }, + { .id = 0x4501, .l2_page_size = 8, .pages_per_sector = 16, .sectors_per_block = 16, .nr_blocks = 16, + .name = "AT25DF081A", /* Yes, 81A id < 81 */ + }, + { + .id = 0x4502, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 16, .name = "AT25DF081", }, { - .id = 0x4701, + .id = 0x4602, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25DF161", + }, + { + .id = 0x4603, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25DL161", + }, + { + .id = 0x4700, .l2_page_size = 8, .pages_per_sector = 16, .sectors_per_block = 16, @@ -60,6 +92,14 @@ .name = "AT25DF321", }, { + .id = 0x4701, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 64, + .name = "AT25DF321A", + }, + { .id = 0x4800, .l2_page_size = 8, .pages_per_sector = 16, @@ -67,6 +107,38 @@ .nr_blocks = 128, .name = "AT25DF641", }, + { + .id = 0x8501, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 16, + .name = "AT25SF081", + }, + { + .id = 0x8600, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25DQ161", + }, + { + .id = 0x8601, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25SF161", + }, + { + .id = 0x8700, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 64, + .name = "AT25DQ321", + }, };
static int adesto_write(const struct spi_flash *flash, u32 offset, size_t len,
mikeb mikeb has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30883 )
Change subject: drivers/spi/adesto.c: Add the rest of >=1MB Adesto chips ......................................................................
Patch Set 2:
This change is ready for review.
Hello Kyösti Mälkki, Paul Menzel, Mike Banon, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/30883
to look at the new patch set (#3).
Change subject: drivers/spi/adesto.c: Add the rest of >=1MB Adesto AT25 chips ......................................................................
drivers/spi/adesto.c: Add the rest of >=1MB Adesto AT25 chips
Required for ACPI S3 suspend support at some motherboards. Synchronizing with flashchips.c/h flashrom source code.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I8c0e6d8f1487ca90f88d4a56af3fb0e21458ef1e --- M src/drivers/spi/adesto.c 1 file changed, 73 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/30883/3
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30883 )
Change subject: drivers/spi/adesto.c: Add the rest of >=1MB Adesto AT25 chips ......................................................................
Patch Set 3: Code-Review+2
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30883 )
Change subject: drivers/spi/adesto.c: Add the rest of >=1MB Adesto AT25 chips ......................................................................
drivers/spi/adesto.c: Add the rest of >=1MB Adesto AT25 chips
Required for ACPI S3 suspend support at some motherboards. Synchronizing with flashchips.c/h flashrom source code.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I8c0e6d8f1487ca90f88d4a56af3fb0e21458ef1e Reviewed-on: https://review.coreboot.org/c/30883 Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/drivers/spi/adesto.c 1 file changed, 73 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved
diff --git a/src/drivers/spi/adesto.c b/src/drivers/spi/adesto.c index 3e3e7d4..5195bec 100644 --- a/src/drivers/spi/adesto.c +++ b/src/drivers/spi/adesto.c @@ -44,15 +44,47 @@
static const struct adesto_spi_flash_params adesto_spi_flash_table[] = { { + .id = 0x4218, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 256, + .name = "AT25SL128A", + }, + { .id = 0x4501, .l2_page_size = 8, .pages_per_sector = 16, .sectors_per_block = 16, .nr_blocks = 16, + .name = "AT25DF081A", /* Yes, 81A id < 81 */ + }, + { + .id = 0x4502, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 16, .name = "AT25DF081", }, { - .id = 0x4701, + .id = 0x4602, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25DF161", + }, + { + .id = 0x4603, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25DL161", + }, + { + .id = 0x4700, .l2_page_size = 8, .pages_per_sector = 16, .sectors_per_block = 16, @@ -60,6 +92,14 @@ .name = "AT25DF321", }, { + .id = 0x4701, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 64, + .name = "AT25DF321A", + }, + { .id = 0x4800, .l2_page_size = 8, .pages_per_sector = 16, @@ -67,6 +107,38 @@ .nr_blocks = 128, .name = "AT25DF641", }, + { + .id = 0x8501, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 16, + .name = "AT25SF081", + }, + { + .id = 0x8600, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25DQ161", + }, + { + .id = 0x8601, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 32, + .name = "AT25SF161", + }, + { + .id = 0x8700, + .l2_page_size = 8, + .pages_per_sector = 16, + .sectors_per_block = 16, + .nr_blocks = 64, + .name = "AT25DQ321", + }, };
static int adesto_write(const struct spi_flash *flash, u32 offset, size_t len,
-
Kyösti Mälkki (Code Review) -
mikeb mikeb (Code Review)