Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37596 )
Change subject: sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor ......................................................................
sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor
Change-Id: I3d8e21e17a0f870d854694e326b10f7d2d04e5ad Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/southbridge/amd/agesa/hudson/reset.c M src/southbridge/amd/pi/hudson/reset.c 2 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/37596/1
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index e329038..ff77eb8 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); }
void do_board_reset(void) diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c index e329038..ff77eb8 100644 --- a/src/southbridge/amd/pi/hudson/reset.c +++ b/src/southbridge/amd/pi/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); }
void do_board_reset(void)
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37596 )
Change subject: sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37596 )
Change subject: sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor ......................................................................
Patch Set 6: Code-Review+2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37596 )
Change subject: sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor ......................................................................
Patch Set 6: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37596 )
Change subject: sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor ......................................................................
sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor
Change-Id: I3d8e21e17a0f870d854694e326b10f7d2d04e5ad Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37596 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Michał Żygowski michal.zygowski@3mdeb.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/amd/agesa/hudson/reset.c M src/southbridge/amd/pi/hudson/reset.c 2 files changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved Angel Pons: Looks good to me, approved Michał Żygowski: Looks good to me, approved
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index e329038..ff77eb8 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); }
void do_board_reset(void) diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c index e329038..ff77eb8 100644 --- a/src/southbridge/amd/pi/hudson/reset.c +++ b/src/southbridge/amd/pi/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); }
void do_board_reset(void)
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Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)
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Kyösti Mälkki (Code Review)
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Michał Żygowski (Code Review)
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Patrick Georgi (Code Review)