[S] Change in coreboot[master]: soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID
Attention is currently required from: Subrata Banik, Paul Menzel, Lean Sheng Tan, Werner Zeh.
Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71275 )
Change subject: soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID ......................................................................
Patch Set 2:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71275/comment/a1043e0b_8e7c27f8 PS1, Line 7: soc/intel/common/block/fast_spi: Fix missing SSID
Maybe: […]
Ack
https://review.coreboot.org/c/coreboot/+/71275/comment/b4cd8926_e0abbdab PS1, Line 10: SSID
presence of subsystem ID
Ack
https://review.coreboot.org/c/coreboot/+/71275/comment/2e52e1c2_5536d616 PS1, Line 13: 00:1f.5 Serial bus controller [0c80]: Intel Corporation Device [8086:7e23]
Is that in the output of `lspci`, or the coreboot console messages?
Yes, it is from lspci. Updated the text to specify the same.
https://review.coreboot.org/c/coreboot/+/71275/comment/b5ee028b_69a473ad PS1, Line 19: SiSkipSsidProgramming
shouldn't u also submit a CL to set this UPD part of this patchtrain?
This patch is for common code. I will be preparing a CL for `SiSkipSsidProgramming` UPD on MTL.
File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/71275/comment/f81422e8_ca1d37b7 PS1, Line 545: .ops_pci = &pci_dev_ops_pci,
I thought that is the default, cf `src/device/pci_device.c`.
Yes but here we are using a different variable than `default_pci_ops_dev` i.e. `fast_spi_dev_ops` and `fast_spi_dev_ops.ops_pci` will be NULL if we do not initialize it.
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Kapil Porwal (Code Review)