[S] Change in coreboot[master]: soc/amd/common/block/lpc/lpc: don't report PCI config IO ports in LPC

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74840 )

Change subject: soc/amd/common/block/lpc/lpc: don't report PCI config IO ports in LPC
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Patch Set 2:

(2 comments)

Commit Message:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175230):
https://review.coreboot.org/c/coreboot/+/74840/comment/3e63fa76_cafe38f5 
PS2, Line 19: PCI: 00:14.3 resource base 0 size 0 align 0 gran 0 limit cf7 flags c0040100 index 10000000
Possible unwrapped commit description (prefer a maximum 72 chars per line)

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175230):
https://review.coreboot.org/c/coreboot/+/74840/comment/6a3b9ce2_b2caec5e 
PS2, Line 20: PCI: 00:14.3 resource base d00 size 0 align 0 gran 0 limit fff flags c0040100 index 10000100
Possible unwrapped commit description (prefer a maximum 72 chars per line)