build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23146 )
Change subject: sb/intel/common/spi.c: Add a SPI write protect function ......................................................................
Patch Set 13:
(4 comments)
https://review.coreboot.org/#/c/23146/13/src/southbridge/intel/common/spi.c File src/southbridge/intel/common/spi.c:
https://review.coreboot.org/#/c/23146/13/src/southbridge/intel/common/spi.c@... PS13, Line 978: (((((limit) >> SPI_FPR_SHIFT) & ICH7_SPI_FPR_MASK) << ICH7_SPI_FPR_LIMIT_SHIFT) |\ line over 80 characters
https://review.coreboot.org/#/c/23146/13/src/southbridge/intel/common/spi.c@... PS13, Line 979: ((((base) >> SPI_FPR_SHIFT) & ICH7_SPI_FPR_MASK) << SPI_FPR_BASE_SHIFT)) line over 80 characters
https://review.coreboot.org/#/c/23146/13/src/southbridge/intel/common/spi.c@... PS13, Line 981: (((((limit) >> SPI_FPR_SHIFT) & ICH9_SPI_FPR_MASK) << ICH9_SPI_FPR_LIMIT_SHIFT) |\ line over 80 characters
https://review.coreboot.org/#/c/23146/13/src/southbridge/intel/common/spi.c@... PS13, Line 982: ((((base) >> SPI_FPR_SHIFT) & ICH9_SPI_FPR_MASK) << SPI_FPR_BASE_SHIFT)) line over 80 characters
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