Change in coreboot[master]: soc/intel/common: soc/intel/tigerlake: tcss change

[Deepti Deshatty (Code Review)]

Deepti Deshatty has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54069 )

Change subject: soc/intel/common: soc/intel/tigerlake: tcss change
......................................................................

soc/intel/common: soc/intel/tigerlake: tcss change

Add config 'SOC_INTEL_COMMON_BLOCK_TCSS_DC_BIAS_SKIP' to skip type-c
aux bias pad configuration in tcss.

TEST=

Signed-off-by: Deepti Deshatty 
Change-Id: Idc0330950b3a85681b8212b61b84811fdbe65149
---
M src/soc/intel/common/block/include/intelblocks/tcss.h
M src/soc/intel/common/block/tcss/Kconfig
M src/soc/intel/common/block/tcss/tcss.c
M src/soc/intel/tigerlake/fsp_params.c
4 files changed, 47 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/54069/1

diff --git a/src/soc/intel/common/block/include/intelblocks/tcss.h b/src/soc/intel/common/block/include/intelblocks/tcss.h
index 29093d1..2a56fa4 100644
--- a/src/soc/intel/common/block/include/intelblocks/tcss.h
+++ b/src/soc/intel/common/block/include/intelblocks/tcss.h
@@ -148,7 +148,7 @@
  * 2) Configure GPIO pads to provide DC Bias on AUX signals
  * 3) Detect DP-over-Type-C alternate mode
  */
-void tcss_configure(const struct typec_aux_bias_pads pads[MAX_TYPE_C_PORTS]);
+void tcss_configure(void);

/*
  * Mainboard method to setup any mux config needed for TCSS display operations.
@@ -167,4 +167,11 @@
  */
 const struct tcss_port_map *mainboard_tcss_get_port_info(size_t *num_ports);

+/*
+ * Soc methode to return 'typec_aux_bias_pads' soc config.
+ * All platforms may not define 'typec_aux_bias_pads'.
+ * Hence weak method is implemented to return NULL.
+ */
+const struct typec_aux_bias_pads *soc_get_typec_aux_bias_pads(void);
+
 #endif /* _TCSS_H_ */
diff --git a/src/soc/intel/common/block/tcss/Kconfig b/src/soc/intel/common/block/tcss/Kconfig
index 3eb0931..e0bf896 100644
--- a/src/soc/intel/common/block/tcss/Kconfig
+++ b/src/soc/intel/common/block/tcss/Kconfig
@@ -8,3 +8,9 @@
    depends on SOC_INTEL_COMMON_BLOCK_TCSS && RUN_FSP_GOP
    help
      Enable displays to be detected over Type-C ports during boot.
+
+config SOC_INTEL_COMMON_BLOCK_TCSS_DC_BIAS_SKIP
+	def_bool n
+	depends on SOC_INTEL_COMMON_BLOCK_TCSS
+	help
+	  Skip IOM configuration to handle Type-C aux lines DC bias in TCSS.
diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c
index da19954..a2fc873 100644
--- a/src/soc/intel/common/block/tcss/tcss.c
+++ b/src/soc/intel/common/block/tcss/tcss.c
@@ -10,9 +10,12 @@
 #include <security/vboot/vboot_common.h>
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
-#include <soc/tcss.h>
 #include <stdlib.h>

+#if !CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_DC_BIAS_SKIP)
+#include <soc/tcss.h>
+#endif
+
 #define BIAS_CTRL_VW_INDEX_SHIFT		16
 #define BIAS_CTRL_BIT_POS_SHIFT			8

@@ -313,6 +316,12 @@
    }
 }

+#if !CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_DC_BIAS_SKIP)
+__weak const struct typec_aux_bias_pads *soc_get_typec_aux_bias_pads(void)
+{
+	NULL;
+}
+
 static uint32_t calc_bias_ctrl_reg_value(gpio_t pad)
 {
    unsigned int vw_index, vw_bit;
@@ -325,20 +334,25 @@
    	cpu_pid;
 }

-static void tcss_configure_aux_bias_pads(
-	const struct typec_aux_bias_pads pads[MAX_TYPE_C_PORTS])
+static void tcss_configure_aux_bias_pads(void)
 {
+	const struct typec_aux_bias_pads *p_pads = soc_get_typec_aux_bias_pads();
+
+	if (*p_pads == NULL)
+		return;
+
    for (size_t i = 0; i < MAX_TYPE_C_PORTS; i++) {
-		if (pads[i].pad_auxn_dc && pads[i].pad_auxp_dc) {
+		if (p_pads[i].pad_auxn_dc && p_pads[i].pad_auxp_dc) {
    		REGBAR32(PID_IOM, IOM_AUX_BIAS_CTRL_PULLUP_OFFSET(i)) =
-				calc_bias_ctrl_reg_value(pads[i].pad_auxp_dc);
+				calc_bias_ctrl_reg_value(p_pads[i].pad_auxp_dc);
    		REGBAR32(PID_IOM, IOM_AUX_BIAS_CTRL_PULLDOWN_OFFSET(i)) =
-				calc_bias_ctrl_reg_value(pads[i].pad_auxn_dc);
+				calc_bias_ctrl_reg_value(p_pads[i].pad_auxn_dc);
    	}
    }
 }
+#endif

-void tcss_configure(const struct typec_aux_bias_pads aux_bias_pads[MAX_TYPE_C_PORTS])
+void tcss_configure(void)
 {
    const struct tcss_port_map *port_map;
    size_t num_ports;
@@ -351,8 +365,10 @@
    for (i = 0; i < num_ports; i++)
    	tcss_init_mux(i, &port_map[i]);

+#if !CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS_DC_BIAS_SKIP)
    /* This should be performed before alternate modes are entered */
-	tcss_configure_aux_bias_pads(aux_bias_pads);
+	tcss_configure_aux_bias_pads();
+#endif

if (CONFIG(ENABLE_TCSS_DISPLAY_DETECTION))
    	tcss_configure_dp_mode(port_map, num_ports);
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 1f1f365..7a6ea48 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -462,16 +462,21 @@
    	printk(BIOS_DEBUG, "FSP MultiPhaseSiInit %s/%s called\n",
    		__FILE__, __func__);

-		if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS)) {
-			const config_t *config = config_of_soc();
-			tcss_configure(config->typec_aux_bias_pads);
-		}
+		if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS))
+			tcss_configure();
    	break;
    default:
    	break;
    }
 }

+/* Return type-c auxillary bias pads */
+const struct typec_aux_bias_pads *soc_get_typec_aux_bias_pads(void)
+{
+	const config_t *config = config_of_soc();
+	return config->typec_aux_bias_pads;
+}
+
 /* Mainboard GPIO Configuration */
 __weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
 {