Change in coreboot[master]: skylake boards: Auto-config SerialIO UPDs (consistent)

[Angel Pons (Code Review)]

Attention is currently required from:  Felix Singer, Frans Hendriks, Michael Niewöhner, Wim Vervoorn.
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55235 )

Change subject: skylake boards: Auto-config SerialIO UPDs (consistent)
......................................................................

skylake boards: Auto-config SerialIO UPDs (consistent)

On those mainboards where the SerialIO configuration is consistent,
select the `DERIVE_SERIALIO_CFG_FROM_DEV_STATE` Kconfig option and
omit the `SerialIoDevMode` devicetree setting. Consistent settings
signify that these changes should not have any functional impact.

Change-Id: I05430ce2b9ef0b66792c188901009491247720fc
Signed-off-by: Angel Pons 
---
M src/mainboard/clevo/kbl-u/Kconfig
M src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb
M src/mainboard/facebook/monolith/Kconfig
M src/mainboard/facebook/monolith/devicetree.cb
M src/mainboard/intel/kunimitsu/Kconfig
M src/mainboard/intel/kunimitsu/devicetree.cb
6 files changed, 5 insertions(+), 20 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/55235/1

diff --git a/src/mainboard/clevo/kbl-u/Kconfig b/src/mainboard/clevo/kbl-u/Kconfig
index c8c364b..9c7313a 100644
--- a/src/mainboard/clevo/kbl-u/Kconfig
+++ b/src/mainboard/clevo/kbl-u/Kconfig
@@ -3,6 +3,7 @@
 config BOARD_CLEVO_KBLU_COMMON
    def_bool n
    select BOARD_ROMSIZE_KB_8192
+	select DERIVE_SERIALIO_CFG_FROM_DEV_STATE
    select EC_ACPI
    select HAVE_ACPI_RESUME
    select HAVE_ACPI_TABLES
diff --git a/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb b/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb
index 607e586..4cdc69b 100644
--- a/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb
+++ b/src/mainboard/clevo/kbl-u/variants/n13xwu/devicetree.cb
@@ -35,10 +35,6 @@
    	.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
    }"

-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit, // LPSS UART
-	}"
-
    device cpu_cluster 0 on
    	device lapic 0 on end
    end
diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig
index fe3b056..ae0d907 100644
--- a/src/mainboard/facebook/monolith/Kconfig
+++ b/src/mainboard/facebook/monolith/Kconfig
@@ -3,6 +3,7 @@
 config BOARD_SPECIFIC_OPTIONS
    def_bool y
    select BOARD_ROMSIZE_KB_16384
+	select DERIVE_SERIALIO_CFG_FROM_DEV_STATE
    select DISABLE_ACPI_HIBERNATE
    select HAVE_ACPI_TABLES
    select HAVE_OPTION_TABLE
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb
index 13b3abc..895247e 100644
--- a/src/mainboard/facebook/monolith/devicetree.cb
+++ b/src/mainboard/facebook/monolith/devicetree.cb
@@ -198,21 +198,6 @@

register "SsicPortEnable" = "0"

-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{ \
-		[PchSerialIoIndexI2C0]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexI2C1]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexI2C4]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled, \
-		[PchSerialIoIndexUart0] = PchSerialIoPci, \
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled, \
-		[PchSerialIoIndexUart2] = PchSerialIoDisabled, \
-	}"
-
    # Lock Down
    register "common_soc_config" = "{
    	.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
@@ -233,6 +218,7 @@
    	device pci 1c.2 on  end # PCI Express Port 3 x1 baseboard WWAN
    	device pci 1c.5 on  end # PCI Express Port 6 x1 baseboard i210
    	device pci 1d.0 on  end # PCI Express Port 9 x4 FPGA
+		# Must leave UART0 enabled or SD/eMMC will not work as PCI
    	device pci 1e.0 on  end # UART #0
    	device pci 1e.4 on  end # eMMC
    	device pci 1f.0 on  # LPC Interface
diff --git a/src/mainboard/intel/kunimitsu/Kconfig b/src/mainboard/intel/kunimitsu/Kconfig
index cf67ca1..30d48e6 100644
--- a/src/mainboard/intel/kunimitsu/Kconfig
+++ b/src/mainboard/intel/kunimitsu/Kconfig
@@ -3,6 +3,7 @@
 config BOARD_SPECIFIC_OPTIONS
    def_bool y
    select BOARD_ROMSIZE_KB_16384
+	select DERIVE_SERIALIO_CFG_FROM_DEV_STATE
    select DRIVERS_GENERIC_MAX98357A
    select DRIVERS_I2C_GENERIC
    select DRIVERS_I2C_NAU8825
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 505a598..31cf75b 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -132,7 +132,6 @@

register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"  # I2C4 is 1.8V

-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
    register "SerialIoDevMode" = "{ \
    	[PchSerialIoIndexI2C0]  = PchSerialIoPci, \
    	[PchSerialIoIndexI2C1]  = PchSerialIoPci, \
@@ -255,6 +254,7 @@
    	device pci 1d.1 off end # PCI Express Port 10
    	device pci 1d.2 off end # PCI Express Port 11
    	device pci 1d.3 off end # PCI Express Port 12
+		# Must leave UART0 enabled or SD/eMMC will not work as PCI
    	device pci 1e.0 on  end # UART #0
    	device pci 1e.1 off end # UART #1
    	device pci 1e.2 off end # GSPI #0