[S] Change in coreboot[main]: soc/mediatek: Obtain LPDDR type from trained memory info

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85033?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/mediatek: Obtain LPDDR type from trained memory info
......................................................................

soc/mediatek: Obtain LPDDR type from trained memory info

Add lpddr_type to ddr_base_info struct to obtain LPDDR type
from trained memory info.

BUG=b:357743097
TEST=build pass

Change-Id: I73c9014784cc4872826d721f3fab9ed1c5255f31
Signed-off-by: Crystal Guo 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85033
Reviewed-by: Yidi Lin 
Tested-by: build bot (Jenkins) 
Reviewed-by: Yu-Ping Wu 
---
M src/soc/mediatek/common/include/soc/dramc_param_common.h
M src/soc/mediatek/common/include/soc/emi.h
M src/soc/mediatek/common/memory.c
3 files changed, 9 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Yu-Ping Wu: Looks good to me, approved
  Yidi Lin: Looks good to me, approved

diff --git a/src/soc/mediatek/common/include/soc/dramc_param_common.h b/src/soc/mediatek/common/include/soc/dramc_param_common.h
index 7dd8bba..a1fac9a 100644
--- a/src/soc/mediatek/common/include/soc/dramc_param_common.h
+++ b/src/soc/mediatek/common/include/soc/dramc_param_common.h
@@ -92,7 +92,8 @@
 struct ddr_base_info {
    u32 config_dvfs;		/* SDRAM_DVFS_FLAG */
    struct sdram_info sdram;
-	u32 voltage_type;		/* SDRAM_VOLTAGE_TYPE */
+	u16 lpddr_type;
+	u16 voltage_type;		/* SDRAM_VOLTAGE_TYPE */
    u32 support_ranks;
    u64 rank_size[RANK_MAX];
    struct emi_mdl emi_config;
diff --git a/src/soc/mediatek/common/include/soc/emi.h b/src/soc/mediatek/common/include/soc/emi.h
index 0070ec1..313ccff 100644
--- a/src/soc/mediatek/common/include/soc/emi.h
+++ b/src/soc/mediatek/common/include/soc/emi.h
@@ -16,5 +16,6 @@
 u32 get_ddr_geometry(void);
 u32 get_ddr_type(void);
 void init_dram_by_params(struct dramc_param *dparam);
+enum mem_chip_type map_to_lpddr_dram_type(uint16_t lpddr_type);

#endif /* SOC_MEDIATEK_COMMON_EMI_H */
diff --git a/src/soc/mediatek/common/memory.c b/src/soc/mediatek/common/memory.c
index 089c6af..f08b1d5 100644
--- a/src/soc/mediatek/common/memory.c
+++ b/src/soc/mediatek/common/memory.c
@@ -106,6 +106,11 @@
    return size;
 }

+__weak enum mem_chip_type map_to_lpddr_dram_type(uint16_t lpddr_type)
+{
+	return MEM_CHIP_LPDDR4X;
+}
+
 static void fill_dram_info(struct mem_chip_info *mc, const struct ddr_base_info *ddr)
 {
    unsigned int c, r;
@@ -118,7 +123,7 @@
    	for (r = 0; r < ddr->mrr_info.rank_nums; r++) {
    		entry->channel = c;
    		entry->rank = r;
-			entry->type = MEM_CHIP_LPDDR4X;
+			entry->type = map_to_lpddr_dram_type(ddr->lpddr_type);
    		entry->channel_io_width = DQ_DATA_WIDTH_LP4;
    		entry->density_mbits = ddr->mrr_info.mr8_density[r] / CHANNEL_MAX /
    				       (MiB / 8);