[S] Change in coreboot[master]: soc/intel/meteorlake: Log CSE RO write protection info for MTL

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69571 )

Change subject: soc/intel/meteorlake: Log CSE RO write protection info for MTL
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soc/intel/meteorlake: Log CSE RO write protection info for MTL

The patch logs CSE RO's write protection information for Meteor Lake
platform. As part of write protection information, coreboot logs status
on CSE RO write protection and range. Also, logs error message if EOM
is disabled, and write protection for CSE RO is not enabled.

Port of commit abe0d810f009 ("soc/intel/alderlake: Log CSE RO write
protection info for ADL").

BUG=none
TEST=Verify the write protection details on google/rex.

Excerpt from google/rex coreboot log:
[DEBUG]  ME: WP for RO is enabled        : YES
[DEBUG]  ME: RO write protection scope - Start=0x4000, End=0x396FFF

Signed-off-by: Kapil Porwal 
Change-Id: Idb072a873a8b8323532799f5fc64f995c9f0a604
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69571
Tested-by: build bot (Jenkins) 
Reviewed-by: Subrata Banik 
Reviewed-by: Sridhar Siricilla 
Reviewed-by: Sridhar Siricilla 
---
M src/soc/intel/meteorlake/me.c
1 file changed, 33 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Sridhar Siricilla: Looks good to me, but someone else must approve
  Sridhar Siricilla: Looks good to me, approved
  Subrata Banik: Looks good to me, approved

diff --git a/src/soc/intel/meteorlake/me.c b/src/soc/intel/meteorlake/me.c
index 4f2bc53..265fd36 100644
--- a/src/soc/intel/meteorlake/me.c
+++ b/src/soc/intel/meteorlake/me.c
@@ -160,6 +160,9 @@
    	hfsts5.fields.cpu_debug_disabled ? "YES" : "NO");
    printk(BIOS_DEBUG, "ME: TXT Support                 : %s\n",
    	hfsts5.fields.txt_support ? "YES" : "NO");
+
+	if (CONFIG(SOC_INTEL_CSE_LITE_SKU))
+		cse_log_ro_write_protection_info(manufacturing_mode);
 }

BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, print_me_fw_version, NULL);