Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[build bot (Jenkins) (Code Review)]

Attention is currently required from: SRIDHAR SIRICILLA, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Tim Wawrzynczak, Subrata Banik, Angel Pons, Sridhar Siricilla, Arthur Heymans, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
......................................................................

Patch Set 66:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-127540):
https://review.coreboot.org/c/coreboot/+/52800/comment/8291df18_8b4d22d4 
PS66, Line 1003: 	if (!heci_send_receive(&fw_ver_msg, sizeof(fw_ver_msg), &resp, &resp_size, HECI_MKHI_ADDR)) {
line over 96 characters