Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47516 )
Change subject: nb/intel/sandybridge: Clean up MR0 composition ......................................................................
nb/intel/sandybridge: Clean up MR0 composition
There's no need to use and-masks here.
Change-Id: If06352daf53ce278dfc64102e023e4f1ea78385c Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/47516/1
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 3d82a00..127b493 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -700,9 +700,6 @@ static const u8 mch_wr_t[12] = { 1, 2, 3, 4, 0, 5, 0, 6, 0, 7, 0, 0 }; const size_t is_mobile = get_platform_type() == PLATFORM_MOBILE;
- /* DLL Reset - self clearing - set after CLK frequency has been changed */ - mr0reg = 1 << 8; - /* Convert CAS to MCH register friendly */ if (ctrl->CAS < 12) { mch_cas = (u16) ((ctrl->CAS - 4) << 1); @@ -714,12 +711,15 @@ /* Convert tWR to MCH register friendly */ mch_wr = mch_wr_t[ctrl->tWR - 5];
- mr0reg = (mr0reg & ~0x0004) | ((mch_cas & 0x1) << 2); - mr0reg = (mr0reg & ~0x0070) | ((mch_cas & 0xe) << 3); - mr0reg = (mr0reg & ~0x0e00) | (mch_wr << 9); + /* DLL Reset - self clearing - set after CLK frequency has been changed */ + mr0reg = 1 << 8; + + mr0reg |= (mch_cas & 0x1) << 2; + mr0reg |= (mch_cas & 0xe) << 3; + mr0reg |= mch_wr << 9;
/* Precharge PD - Fast (desktop) 1 or slow (mobile) 0 - mostly power-saving feature */ - mr0reg = (mr0reg & ~(1 << 12)) | (!is_mobile << 12); + mr0reg |= !is_mobile << 12; return mr0reg; }
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47516
to look at the new patch set (#3).
Change subject: nb/intel/sandybridge: Clean up MR0 composition ......................................................................
nb/intel/sandybridge: Clean up MR0 composition
There's no need to use and-masks here.
Tested on Asus P8H61-M PRO, still boots.
Change-Id: If06352daf53ce278dfc64102e023e4f1ea78385c Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/47516/3
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47516 )
Change subject: nb/intel/sandybridge: Clean up MR0 composition ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47516 )
Change subject: nb/intel/sandybridge: Clean up MR0 composition ......................................................................
nb/intel/sandybridge: Clean up MR0 composition
There's no need to use and-masks here.
Tested on Asus P8H61-M PRO, still boots.
Change-Id: If06352daf53ce278dfc64102e023e4f1ea78385c Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47516 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 7 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index b5fcc8b..59dd5be 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -690,9 +690,6 @@ static const u8 mch_wr_t[12] = { 1, 2, 3, 4, 0, 5, 0, 6, 0, 7, 0, 0 }; const size_t is_mobile = get_platform_type() == PLATFORM_MOBILE;
- /* DLL Reset - self clearing - set after CLK frequency has been changed */ - mr0reg = 1 << 8; - /* Convert CAS to MCH register friendly */ if (ctrl->CAS < 12) { mch_cas = (u16) ((ctrl->CAS - 4) << 1); @@ -704,12 +701,15 @@ /* Convert tWR to MCH register friendly */ mch_wr = mch_wr_t[ctrl->tWR - 5];
- mr0reg = (mr0reg & ~0x0004) | ((mch_cas & 0x1) << 2); - mr0reg = (mr0reg & ~0x0070) | ((mch_cas & 0xe) << 3); - mr0reg = (mr0reg & ~0x0e00) | (mch_wr << 9); + /* DLL Reset - self clearing - set after CLK frequency has been changed */ + mr0reg = 1 << 8; + + mr0reg |= (mch_cas & 0x1) << 2; + mr0reg |= (mch_cas & 0xe) << 3; + mr0reg |= mch_wr << 9;
/* Precharge PD - Fast (desktop) 1 or slow (mobile) 0 - mostly power-saving feature */ - mr0reg = (mr0reg & ~(1 << 12)) | (!is_mobile << 12); + mr0reg |= !is_mobile << 12; return mr0reg; }
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)