Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr
These three requlators are controlled via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c 2 files changed, 70 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/1
diff --git a/src/mainboard/google/asurada/Makefile.inc b/src/mainboard/google/asurada/Makefile.inc index 02fb830..d3f8ce6 100644 --- a/src/mainboard/google/asurada/Makefile.inc +++ b/src/mainboard/google/asurada/Makefile.inc @@ -13,6 +13,7 @@ romstage-y += chromeos.c romstage-y += romstage.c romstage-y += sdram_configs.c +romstage-y += regulator.c
ramstage-y += memlayout.ld ramstage-y += boardid.c diff --git a/src/mainboard/google/asurada/regulator.c b/src/mainboard/google/asurada/regulator.c new file mode 100644 index 0000000..514c423 --- /dev/null +++ b/src/mainboard/google/asurada/regulator.c @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <ec/google/chromeec/ec.h> +#include <soc/regulator.h> + +enum mt6360_regulator_id { + MT6360_LDO3, + MT6360_LDO5, + MT6360_LDO6, + MT6360_LDO7, + MT6360_BUCK1, + MT6360_BUCK2, + + MT6360_REGULATOR_COUNT, +}; + +void mainboard_set_vdd2_vol(uint32_t voltage_uv) +{ + uint32_t voltage_mv = voltage_uv / 1000; + + google_chromeec_regulator_set_voltage(MT6360_BUCK1, + voltage_mv, + voltage_mv); +} + +void mainboard_set_vddq_vol(uint32_t voltage_uv) +{ + uint32_t voltage_mv = voltage_uv / 1000; + + google_chromeec_regulator_set_voltage(MT6360_LDO7, + voltage_mv, + voltage_mv); +} + +void mainboard_set_vmddr_vol(uint32_t voltage_uv) +{ + uint32_t voltage_mv = voltage_uv / 1000; + + google_chromeec_regulator_set_voltage(MT6360_LDO6, + voltage_mv, + voltage_mv); +} + +uint32_t mainboard_get_vdd2_vol(void) +{ + uint32_t voltage_mv = 0; + + google_chromeec_regulator_get_voltage(MT6360_BUCK1, &voltage_mv); + + return voltage_mv * 1000; +} + +uint32_t mainboard_get_vddq_vol(void) +{ + uint32_t voltage_mv = 0; + + google_chromeec_regulator_get_voltage(MT6360_LDO7, &voltage_mv); + + return voltage_mv * 1000; +} + +uint32_t mainboard_get_vmddr_vol(void) +{ + uint32_t voltage_mv = 0; + + google_chromeec_regulator_get_voltage(MT6360_LDO6, &voltage_mv); + + return voltage_mv * 1000; +}
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#5).
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr
These three requlators are controlled via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c 2 files changed, 70 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/5
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
Patch Set 5:
(4 comments)
we can unify the mapping in one place.
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 8: MT6360_LDO3 Probably make it clear given you're starting with 3. e.g.,
MT6360_LDO3 = 0,
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 17: static int get_mt6360_regulator_id(enum mtk_regulator regulator) { switch(regulator) { case MTK_REGULATOR_Vdd1: return MT6360_DUMMY; case MTK_REGULATOR_VDD2: return MT6360_BUCK1; ... } printk(BIOS_WARNING...); return -1; }
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 24: MTK_REGULATOR_VDD1: : break; do nothing?
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 26: case MTK_REGULATOR_VDD2: : google_chromeec_regulator_set_voltage(MT6360_BUCK1, : voltage_mv, : voltage_mv); : break; : case MTK_REGULATOR_VDDQ: : google_chromeec_regulator_set_voltage(MT6360_LDO7, : voltage_mv, : voltage_mv); : break; : case MTK_REGULATOR_VMDDR: : google_chromeec_regulator_set_voltage(MT6360_LDO6, : voltage_mv, : voltage_mv); : break; : default: : printk(BIOS_WARNING, "Invalid regualtor ID: %d\n", regulator); : break; : } int id = get_mt6360_regulator_id(regulator);
if (id < 0) return; google_chromeec_regulator_set_voltage(id, voltage_mv, voltage_mv);
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 17:
static int get_mt6360_regulator_id(enum mtk_regulator regulator) […]
DRAM regulators are controlled by mt6360(EC side) and MT6359(AP side) on MT8192. Each PMIC has its own regulator ID definition. Such remapping may not easy to apply when using multiple PMICs.
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 24: MTK_REGULATOR_VDD1: : break;
do nothing?
controlled by mt6359p
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 17:
DRAM regulators are controlled by mt6360(EC side) and MT6359(AP side) on MT8192. […]
I see, but do we plan to add more? In current implementation it seems that all PMICs are in 6360(=EC) and you left 6359 unimplemented.
Or we can do:
int id;
id = get_mt6360_id(regulator); if (id >= 0) return google_chromeec_regulator_do_something(id, ...);
id = get_mt6359_id(regulator); if (id >= 0) return ap_6359_handler(id, ...);
printk(BIOS_ERROR, "invalid regulator: %d\n", regulator); ...
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement regulator control for vdd2, vddq and vmddr ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 17:
I see, but do we plan to add more? In current implementation it seems that all PMICs are in 6360(= […]
6359 implementation depends on CB:45399 which might take longer review process. I planned to summit a separated patch for 6359 implementation.
I can add 6359 implementation to this patch, too.
Thank you for the suggestion on above.
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#7).
Change subject: mb/google/asurada: Implement board-specific regulator controls. ......................................................................
mb/google/asurada: Implement board-specific regulator controls.
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h 3 files changed, 101 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/7
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls. ......................................................................
Patch Set 7:
(4 comments)
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 8: MT6360_LDO3
Probably make it clear given you're starting with 3. e.g., […]
Ack
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 17:
6359 implementation depends on CB:45399 which might take longer review process. […]
Ack
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 24: MTK_REGULATOR_VDD1: : break;
controlled by mt6359p
Ack
https://review.coreboot.org/c/coreboot/+/46406/5/src/mainboard/google/asurad... PS5, Line 26: case MTK_REGULATOR_VDD2: : google_chromeec_regulator_set_voltage(MT6360_BUCK1, : voltage_mv, : voltage_mv); : break; : case MTK_REGULATOR_VDDQ: : google_chromeec_regulator_set_voltage(MT6360_LDO7, : voltage_mv, : voltage_mv); : break; : case MTK_REGULATOR_VMDDR: : google_chromeec_regulator_set_voltage(MT6360_LDO6, : voltage_mv, : voltage_mv); : break; : default: : printk(BIOS_WARNING, "Invalid regualtor ID: %d\n", regulator); : break; : }
int id = get_mt6360_regulator_id(regulator); […]
Ack
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls. ......................................................................
Patch Set 7:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46406/7/src/mainboard/google/asurad... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/7/src/mainboard/google/asurad... PS7, Line 21: switch(regulator) { space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46406/7/src/mainboard/google/asurad... PS7, Line 37: switch(regulator) { space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/46406/7/src/mainboard/google/asurad... PS7, Line 79: if (regulator == MTK_REGULATOR_VDD1) { braces {} are not necessary for single statement blocks
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#8).
Change subject: mb/google/asurada: Implement board-specific regulator controls. ......................................................................
mb/google/asurada: Implement board-specific regulator controls.
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h 3 files changed, 100 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/8
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#9).
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h 3 files changed, 100 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/9
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#10).
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h 3 files changed, 100 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/10
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46406/10/src/mainboard/google/asura... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/10/src/mainboard/google/asura... PS10, Line 72: regualtor regulator
https://review.coreboot.org/c/coreboot/+/46406/10/src/mainboard/google/asura... PS10, Line 95: regualtor regulator
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#11).
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h 3 files changed, 100 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/11
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46406/10/src/mainboard/google/asura... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/10/src/mainboard/google/asura... PS10, Line 72: regualtor
regulator
Ack
https://review.coreboot.org/c/coreboot/+/46406/10/src/mainboard/google/asura... PS10, Line 95: regualtor
regulator
Ack
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 11:
(7 comments)
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... File src/mainboard/google/asurada/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 16: romstage-y += regulator.c Please sort these alphabetically (except memlayout.ld).
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 8: mt6360_regulator_id Should we put it in soc/mediatek/mt8192/include/soc/mt6360.h?
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 15: Extra blank line
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 51: underly underlying
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 50: /* Handle the regulator which does not have a regulator ID : * in its underly implementation. */ Please choose one of the following formats:
/* Handle the regulator which does not have a regulator ID in its underly implementation. */
/* * Handle the regulator which does not have a regulator ID * in its underly implementation. */
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 78: underly underlying
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 77: /* Handle the regulator which does not have a regulator ID : * in its underly implementation. */ Same
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#12).
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h A src/soc/mediatek/mt8192/include/soc/mt6360.h 4 files changed, 110 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/12
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 13:
(7 comments)
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... File src/mainboard/google/asurada/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 16: romstage-y += regulator.c
Please sort these alphabetically (except memlayout.ld).
Ack
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 8: mt6360_regulator_id
Should we put it in soc/mediatek/mt8192/include/soc/mt6360. […]
Ack
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 15:
Extra blank line
Ack
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 51: underly
underlying
Ack
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 50: /* Handle the regulator which does not have a regulator ID : * in its underly implementation. */
Please choose one of the following formats: […]
Ack
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 78: underly
underlying
Ack
https://review.coreboot.org/c/coreboot/+/46406/11/src/mainboard/google/asura... PS11, Line 77: /* Handle the regulator which does not have a regulator ID : * in its underly implementation. */
Same
Ack
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 13:
(2 comments)
Final 2 nits
https://review.coreboot.org/c/coreboot/+/46406/13/src/mainboard/google/asura... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/13/src/mainboard/google/asura... PS13, Line 41: which that
https://review.coreboot.org/c/coreboot/+/46406/13/src/mainboard/google/asura... PS13, Line 70: which that
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#14).
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h A src/soc/mediatek/mt8192/include/soc/mt6360.h 4 files changed, 110 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/14
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 14:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46406/13/src/mainboard/google/asura... File src/mainboard/google/asurada/regulator.c:
https://review.coreboot.org/c/coreboot/+/46406/13/src/mainboard/google/asura... PS13, Line 41: which
that
Ack
https://review.coreboot.org/c/coreboot/+/46406/13/src/mainboard/google/asura... PS13, Line 70: which
that
Ack
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
Patch Set 14: Code-Review+2
Hello Xi Chen, build bot (Jenkins), Patrick Georgi, Martin Roth, Yu-Ping Wu, Hsin-Hsiung Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46406
to look at the new patch set (#17).
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h A src/soc/mediatek/mt8192/include/soc/mt6360.h 4 files changed, 110 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/46406/17
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46406 )
Change subject: mb/google/asurada: Implement board-specific regulator controls ......................................................................
mb/google/asurada: Implement board-specific regulator controls
Currently, five regulator controls are implemented for DRAM calibration and DVFS feature.
The regulators for VCORE and VM18 are controlled by MT6359. The reguatlors for VDD1, VDD2 and VMDDR are controlled by MT6360 via EC.
BUG=b:147789962 BRANCH=none TEST=verified with DRAM driver
Signed-off-by: Yidi Lin yidi.lin@mediatek.com Change-Id: Id06a8196ca4badc51b06759afb07b5664278d13b Reviewed-on: https://review.coreboot.org/c/coreboot/+/46406 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/mainboard/google/asurada/Makefile.inc A src/mainboard/google/asurada/regulator.c M src/soc/mediatek/common/include/soc/regulator.h A src/soc/mediatek/mt8192/include/soc/mt6360.h 4 files changed, 110 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved
diff --git a/src/mainboard/google/asurada/Makefile.inc b/src/mainboard/google/asurada/Makefile.inc index 02fb830..87582b7 100644 --- a/src/mainboard/google/asurada/Makefile.inc +++ b/src/mainboard/google/asurada/Makefile.inc @@ -11,6 +11,7 @@ romstage-y += memlayout.ld romstage-y += boardid.c romstage-y += chromeos.c +romstage-y += regulator.c romstage-y += romstage.c romstage-y += sdram_configs.c
diff --git a/src/mainboard/google/asurada/regulator.c b/src/mainboard/google/asurada/regulator.c new file mode 100644 index 0000000..b06388d --- /dev/null +++ b/src/mainboard/google/asurada/regulator.c @@ -0,0 +1,92 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <ec/google/chromeec/ec.h> +#include <soc/mt6359p.h> +#include <soc/mt6360.h> +#include <soc/regulator.h> + +static int get_mt6360_regulator_id(enum mtk_regulator regulator) +{ + switch (regulator) { + case MTK_REGULATOR_VDD2: + return MT6360_BUCK1; + case MTK_REGULATOR_VDDQ: + return MT6360_LDO7; + case MTK_REGULATOR_VMDDR: + return MT6360_LDO6; + default: + break; + } + + return -1; +} + +static int get_mt6359p_regulator_id(enum mtk_regulator regulator) +{ + switch (regulator) { + case MTK_REGULATOR_VCORE: + return MT6359P_GPU11; + default: + break; + } + + return -1; +} + +void mainboard_set_regulator_vol(enum mtk_regulator regulator, + uint32_t voltage_uv) +{ + /* + * Handle the regulator that does not have a regulator ID + * in its underlying implementation. + */ + if (regulator == MTK_REGULATOR_VDD1) { + mt6359p_set_vm18_voltage(voltage_uv); + return; + } + + int id; + + id = get_mt6360_regulator_id(regulator); + if (id >= 0) { + uint32_t voltage_mv = voltage_uv / 1000; + google_chromeec_regulator_set_voltage(id, voltage_mv, voltage_mv); + return; + } + + id = get_mt6359p_regulator_id(regulator); + if (id >= 0) { + mt6359p_buck_set_voltage(id, voltage_uv); + return; + } + + printk(BIOS_WARNING, "Invalid regulator ID: %d\n", regulator); +} + +uint32_t mainboard_get_regulator_vol(enum mtk_regulator regulator) +{ + /* + * Handle the regulator that does not have a regulator ID + * in its underlying implementation. + */ + if (regulator == MTK_REGULATOR_VDD1) + return mt6359p_get_vm18_voltage(); + + int id; + + id = get_mt6360_regulator_id(regulator); + if (id >= 0) { + uint32_t voltage_mv = 0; + google_chromeec_regulator_get_voltage(id, &voltage_mv); + return voltage_mv * 1000; + } + + id = get_mt6359p_regulator_id(regulator); + if (id >= 0) + return mt6359p_buck_get_voltage(id); + + printk(BIOS_WARNING, "Invalid regulator ID: %d\n", regulator); + + return 0; +} diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h index 258d550..6d9ff4e 100644 --- a/src/soc/mediatek/common/include/soc/regulator.h +++ b/src/soc/mediatek/common/include/soc/regulator.h @@ -10,6 +10,7 @@ MTK_REGULATOR_VDD2, MTK_REGULATOR_VDDQ, MTK_REGULATOR_VMDDR, + MTK_REGULATOR_VCORE, };
void mainboard_set_regulator_vol(enum mtk_regulator regulator, diff --git a/src/soc/mediatek/mt8192/include/soc/mt6360.h b/src/soc/mediatek/mt8192/include/soc/mt6360.h new file mode 100644 index 0000000..a6ee76c --- /dev/null +++ b/src/soc/mediatek/mt8192/include/soc/mt6360.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT6360_H__ +#define __SOC_MEDIATEK_MT6360_H__ + +enum mt6360_regulator_id { + MT6360_LDO3 = 0, + MT6360_LDO5, + MT6360_LDO6, + MT6360_LDO7, + MT6360_BUCK1, + MT6360_BUCK2, + MT6360_REGULATOR_COUNT, +}; + +#endif /* __SOC_MEDIATEK_MT6360_H__ */