Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56006 )
Change subject: soc/intel/alderlake: Switch to runtime generation of Intel Power Engine
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/alderlake/pmc.c:
https://review.coreboot.org/c/coreboot/+/56006/comment/b96f3de5_65138a23
PS1, Line 126: /* Add Intel Power Engine device */
`generate_acpi_power_engine` will not be compiled in unless `SOC_INTEL_COMMON_BLOCK_ACPI_PEP` is sel […]
If SOC_INTEL_COMMON_BLOCK_ACPI_PEP is unselected temporary for some test reason, this line also need to be commented out in order to build.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/56006
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I617bc3d1c3cf4ac6b6cbbd790dcf62e731024834
Gerrit-Change-Number: 56006
Gerrit-PatchSet: 1
Gerrit-Owner: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Reviewer: Cliff Huang
cliff.huang@intel.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-Attention: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Attention: Patrick Rudolph
siro@das-labor.org
Gerrit-Comment-Date: Wed, 07 Jul 2021 17:54:57 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Cliff Huang
cliff.huang@intel.com
Comment-In-Reply-To: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-MessageType: comment